Semiconductor device having oscillator circuit

Abstract

An oscillation circuit section is provided which can attain the reduction of a consumed power amount and the reduction of a manufacturing cost. In a semiconductor device, voltages are generated to drive the oscillation circuit section by using a plurality of MOS transistors which are connected in serial and each of which is in a diode connection. At this time, each voltage is generated based on a power supply voltage and a ratio of the threshold voltages of the plurality of MOS transistors. Therefore, it is possible to suppress the threshold voltage of each MOS transistor, to save an area of each MOS transistor, and to reduce the consumed power amount of the oscillation circuit section.

What is claimed is: 
     
       1. A semiconductor device comprising:
 a first power supply section configured to supply a first power supply voltage; 
 a second power supply section configured to supply a second power supply voltage; 
 an amplitude control circuit section configured to receive said first and second power supply voltages and generate first and second supply voltages; and 
 an oscillation circuit section configured to receive said first and second supply voltages from first and second input sections to carry out an oscillation, 
 wherein said amplitude control circuit section comprises: 
 a plurality of MOS transistors, which are connected in serial between said first and second power supply sections, and each of which is in a diode connection; 
 a first output section connected with one of said plurality of MOS transistors to output said first supply voltage; and 
 a second output section connected with another of said plurality of MOS transistors to output said second supply voltage, 
 wherein a back gate of at least one of said plurality of MOS transistors is connected with a source thereof. 
 
     
     
       2. A semiconductor device comprising:
 a first power supply section configured to supply a first power supply voltage; 
 a second power supply section configured to supply a second power supply voltage; 
 an amplitude control circuit section configured to receive said first and second power supply voltages and generate first and second supply voltages; and 
 an oscillation circuit section configured to receive said first and second supply voltages from first and second input sections to carry out an oscillation, 
 wherein said amplitude control circuit section comprises: 
 a plurality of MOS transistors, which are connected in serial between said first and second power supply sections, and each of which is in a diode connection; 
 a first output section connected with one of said plurality of MOS transistors to output said first supply voltage; and 
 a second output section connected with another of said plurality of OS transistors to output said second supply voltage, 
 wherein said plurality of MOS transistors comprises: 
 a first NMOS transistor connected with said first power supply section; 
 a first PMOS transistor connected with said second power supply section; 
 a second NMOS transistor connected between said first NMOS transistor and said first PMOS transistor, and connected with said first output section; and 
 a second PMOS transistor connected between said first PMOS transistor and said second NMOS transistor and connected with said second output section, 
 wherein a back gate of each of said first and second NMOS transistors is connected with said second power supply section, 
 wherein a back gate of said first PMOS transistor is connected with said first power supply section, and 
 wherein a back gate of said second PMOS transistor is connected with a source thereof. 
 
     
     
       3. The semiconductor device according to  claim 2 , further comprising:
 a control circuit connected with an output of said oscillation circuit section and configured to generate a control signal of a first condition until oscillation of said oscillation circuit section becomes stable, and generate said control signal of a second condition while the oscillation is stable; 
 a first switch circuit section configured to connect said first power supply section to said first input section when said control signal is in the first condition, and connect said first output section to said first input section while said control signal is in the second condition; and 
 a second switch circuit section configured to connect said second power supply section to said second input section when said control signal is in the first condition, and connect said second output section to said second input section while said control signal is in the second condition. 
 
     
     
       4. The semiconductor device according to  claim 2 , wherein said amplitude control circuit section further comprises:
 a third NMOS transistor connected between said first NMOS transistor and said second NMOS transistor; 
 a third output section connected with said third NMOS transistor; 
 a third PMOS transistor connected between said first PMOS transistor and said second PMOS transistor; and 
 a fourth output section connected with said third PMOS transistor, 
 wherein the semiconductor device further comprises: 
 a control circuit connected with an output of said oscillation circuit section, and configured to generate a first control signal of a first condition and a second control signal of the first condition until the oscillation of said oscillation circuit section becomes stable, and generate said first control signal of a second condition and said second control signal of the second condition while the oscillation is stable, and generate said first control signal of a third condition and said second control signal of the third condition when the oscillation is instable; 
 a first selector circuit section configured to connect said first power supply section with said first input section when said first control signal is in the first condition, connect said first output section with said first input section when said first control signal is in the second condition, and connect said third output section with said first input section when said first control signal is in the third condition; and 
 a second selector circuit section configured to connect said second power supply section with said second input section when said second control signal is in the first condition, connect said second output section with said second input section when said second control signal is in the second condition, and connect said fourth output section with said second input section when said second control signal is in the third condition. 
 
     
     
       5. A semiconductor device comprising:
 a first power supply section configured to supply a first power supply voltage; 
 a second power supply section configured to supply a second power supply voltage; 
 an amplitude control circuit section configured to receive said first and second power supply voltages and generate first and second supply voltages; and 
 an oscillation circuit section configured to receive said first and second supply voltages from first and second input sections to carry out an oscillation, 
 wherein said amplitude control circuit section comprises: 
 a plurality of MOS transistors, which are connected in serial between said first and second power supply sections, and each of which is in a diode connection; 
 a first output section connected with one of said plurality of MOS transistors to output said first supply voltage; and 
 a second output section connected with another of said plurality of MOS transistors to output said second supply voltage, 
 wherein said plurality of MOS transistors comprises: 
 a first NMOS transistor connected with said first power supply section; 
 a first PMOS transistor connected with said second power supply section; 
 a second NMOS transistor connected between said first NMOS transistor and said first PMOS transistor and connected with said first output section; and 
 a second PMOS transistor connected between said first PMOS transistor and said second NMOS transistor and connected with said second output section, 
 wherein a back gate of each of said first and second PMOS transistors is connected with said first power supply section, 
 wherein a back gate of said first NMOS transistor is connected with said second power supply section, and 
 wherein a back gate of said second NMOS transistor is connected with a source thereof. 
 
     
     
       6. A semiconductor device comprising:
 a first power supply section configured to supply a first power supply voltage; 
 a second power supply section configured to supply a second power supply voltage; 
 an amplitude control circuit section configured to receive said first and second power supply voltages and generate first and second supply voltages; and 
 an oscillation circuit section configured to receive said first and second supply voltages from first and second input sections to carry out an oscillation, 
 wherein said amplitude control circuit section comprises: 
 a plurality of MOS transistors, which are connected in serial between said first and second power supply sections, and each of which is in a diode connection; 
 a first output section connected with one of said plurality of MOS transistors to output said first supply voltage; and 
 a second output section connected with another of said plurality of MOS transistors to output said second supply voltage, 
 wherein said amplitude control circuit section further comprises: 
 a first switch circuit section configured to supply said first power supply voltage to said first input section until oscillation of said oscillation circuit section becomes stable, and supply said first supply voltage to said first input section while the oscillation is stable; and 
 a second switch circuit section configured to supply said second power supply voltage to said second input section until the oscillation becomes stable, and supply said second supply voltage to said second input section while the oscillation is stable. 
 
     
     
       7. The semiconductor device according to  claim 6 , wherein said amplitude control circuit section further comprises:
 a third output section configured to output a third supply voltage between said first power supply voltage and said first supply voltage; and 
 a fourth output section configured to output a fourth supply voltage between said second power supply voltage and said second supply voltage, 
 wherein said first switch circuit section supplies said third supply voltage to said first input section when the oscillation is instable, and 
 wherein said second switch circuit section supplies said fourth supply voltage to said second input section when the oscillation is instable.