Segmented column-parallel analog-to-digital converter

Abstract

A successive approximation A/D converter which includes a sub ranging classifier that receives an input signal and classifies said input signal according to plural different highest resolution bits, to determine a range of the input signal, and creating a set of most significant bits based on said range, said subranging classifier also setting and determining an offset based on said range, and a successive approximation A/D converted that converting lowest resolution parts of the input signal as adjusted by the offset.

What is claimed is: 
     
       1. A two-stage successive approximation A/D converter, comprising:
 a first stage that subranges an input signal according to plural different levels, and a second stage that carries out a successive approximation A/D conversion using capacitors, where said capacitors are energized based on a non linear offset amount created by said first stage, that non-linearly provide more resolution toward a bottom end, wherein said offset is non linear in a way that compensates for an amount of photon shot noise. 
 
     
     
       2. The converter as in  claim 1 , wherein said first stage classifies said input signal according to plural different highest resolution bits, to determine a range of the input signal, and creating a set of most significant bits based on said range, and also setting and determining a non-linear offset based on said range. 
     
     
       3. The converter as in  claim 1 , wherein said second stage carries out a successive approximation A/D conversion by converting lowest resolution parts of the input signal as adjusted by the non-linear offset. 
     
     
       4. The converter as in  claim 1 , wherein said offset is selected by closing one of a bank of switches, said switches each controlling supply of an offset voltage, and where different switches each control a different amount of offset voltage. 
     
     
       5. The converter as in  claim 1 , wherein said successive approximation A/D conversion carried out by said second stage compares an adjusted input signal, adjusted according to said offset voltage, with a reference. 
     
     
       6. The converter as in  claim 5 , wherein said reference is sampled at every conversion time. 
     
     
       7. The converter as in  claim 5 , wherein said reference is a reset level that is sampled at every conversion time by sampling a reset level first onto a capacitor, and sampling a sample level second on to said capacitor, to form a differential between said reset level in said sample level on the same capacitor. 
     
     
       8. The converter as in  claim 1 , wherein said second stage uses 2N capacitors and said converter outputs more than N bits. 
     
     
       9. A method of successive approximation A/D converting, comprising:
 first subranging an input signal according to plural different levels, that provide more resolution toward a bottom end; 
 using said subranging to select an offset signal, where said offset signal is non-linear between different levels selected by said subranging, wherein said offset is non linear by an amount based on photon shot noise, and 
 carrying out a successive approximation A/D conversion using capacitors, where said capacitors are energized based on said reference signal. 
 
     
     
       10. The method as in  claim 9 , wherein said first subranging classifies said input signal according to plural different highest resolution bits, to determine a range of the input signal, and creating a set of most significant bits based on said range, said subranging also setting and determining said non-linear offset based on said range. 
     
     
       11. The method as in  claim 9 , wherein said a successive approximation A/D conversion is carried out by converting lowest resolution parts of the input signal as adjusted by the offset. 
     
     
       12. The method as in  claim 9 , wherein said offset is selected by closing one of a bank of switches, said switches controlling different offset voltages, and where different switches each control a different amount of offset voltage. 
     
     
       13. The method as in  claim 9 , wherein said successive approximation A/D conversion compares an adjusted input signal, adjusted by said offset voltage with a reference. 
     
     
       14. The method as in  claim 13 , wherein said reference is sampled at every conversion time by sampling a reset level first onto a capacitor, and sampling a sample level second on to said capacitor, to form a differential between said reset level in said sample level on the same capacitor. 
     
     
       15. The method as in  claim 13 , wherein said reference is a reset level that is sampled at every conversion time. 
     
     
       16. The method as in  claim 13 , wherein said second stage uses 2N capacitors and said converter outputs more than N bits.