Memory device, memory control device, and memory control method

Abstract

A memory device includes: a plurality of nonvolatile memory sections configured to allow one memory cell to record data of a plurality of bits, and to include a corresponding number of pages to the plurality of bits in accordance with a plurality of the memory cells as a write control unit; and a control section configured to control writing and reading data to and from the plurality of nonvolatile memory sections, wherein among the plurality of nonvolatile memory sections, if data is written into one of the nonvolatile memory sections, the data is written for each page in sequence from a low-order page to a high-order page, and when the data is written into the low-order page, control is performed such that the data to be written into the low-order page is written into any area of the other of the nonvolatile memory sections at same timing.

The invention is claimed as follows: 
     
       1. A memory device comprising:
 a plurality of nonvolatile memory sections each comprising a plurality of memory cells connected to word lines; and 
 a control section configured to perform control of writing and reading data to and from the plurality of nonvolatile memory sections, 
 wherein each of the plurality of memory cells is configured to record data of a plural number of bits, 
 wherein each word line includes a group of pages having a number of pages equal to the plural number of bits, each page comprising memory cells connected to a same word line, and 
 wherein for the plurality of nonvolatile memory sections, in a case where data is written into one of the nonvolatile memory sections, the data is written for each group of pages in sequence from a low-order page to a high-order page, and when the data is written into the low-order page, control is performed such that the data to be written into the low-order page is written into any area of the other of the nonvolatile memory sections at a same time. 
 
     
     
       2. The memory device according to  claim 1 ,
 wherein when the control section writes data into the low-order page, the control section is allowed to access at least two nonvolatile memory sections simultaneously among the plurality of nonvolatile memory sections. 
 
     
     
       3. The memory device according to  claim 1 ,
 wherein the plural number of bits is two. 
 
     
     
       4. The memory device according to  claim 1 ,
 wherein the nonvolatile memory sections are NAND-type flash memories. 
 
     
     
       5. A memory control device for performing control of reading and writing data on a plurality of nonvolatile memory sections each comprising a plurality of memory cells connected to word lines, wherein each of the plurality of memory cells is configured to record data of a plural number of bits, and wherein each word line includes a group of pages having a number of pages equal to the plural number of bits, each page comprising memory cells connected to a same word line, the memory control device performing processing comprising:
 for the plurality of nonvolatile memory sections, in a case where data is written into one of the nonvolatile memory sections, writing the data for each group of pages in sequence from a low-order page to a high-order page, and when the data is written into the low-order page, performing control such that the data to be written into the low-order page is written into any area of the other of the nonvolatile memory sections at a same time. 
 
     
     
       6. The memory control device according to  claim 5 ,
 wherein the nonvolatile memory sections are NAND-type flash memories. 
 
     
     
       7. A method of controlling a memory, in which data read and write control is performed on a plurality of nonvolatile memory sections each comprising a plurality of memory cells connected to word lines, wherein each of the plurality of memory cells is configured to record data of a plural number of bits, and wherein each word line includes a group of pages having a number of pages equal to the plural number of bits, each page comprising memory cells connected to a same word line, the method comprising:
 for the plurality of nonvolatile memory sections, in a case where data is written into one of the nonvolatile memory sections, writing the data for each group of pages in sequence from a low-order page to a high-order page, and when the data is written into the low-order page, performing control such that the data to be written into the low-order page is written into any area of the other of the nonvolatile memory sections at a same time.