US8923383B2ActiveUtilityA1

Transmitter and transmitting method using delay locked loop

55
Assignee: MTEK VISION CO LTDPriority: Oct 17, 2011Filed: Oct 10, 2012Granted: Dec 30, 2014
Est. expiryOct 17, 2031(~5.3 yrs left)· nominal 20-yr term from priority
H04B 5/02H04L 25/4902H04L 27/02H03K 7/00H04B 5/48
55
PatentIndex Score
1
Cited by
7
References
10
Claims

Abstract

An NFC transmitter using a delay-locked loop and an NFC transmission method thereof are provided. The NFC near field communication (NFC) transmitter includes a delay-locked loop (DLL) that outputs a reference clock and a delayed clock using the reference clock and a value of a duty code which are input, a clock output unit that receives the reference clock and the delayed clock, outputs the reference clock in any of a high section and a low section of input data, and outputs a converted clock having a duty ratio using the reference clock and the delayed clock in the other of the high section and the lower section of the input data, and an RF signal generator that generates an RF signal using a PWM (Pulse Width Modulation) signal input from the clock output unit.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
       1. A near field communication (NFC) transmitter comprising:
 a delay-locked loop (DLL) that outputs a reference clock and a delayed clock using a value of a duty code and the reference clock which are input; 
 a clock output unit that receives the reference clock and the delayed clock, outputs only the reference clock in either of a high logic level and a low logic level of input data, and outputs a converted clock having a duty ratio using both the reference clock and the delayed clock in the other of the high logic level and the low logic level of the input data to generate a Pulse Width Modulation (PWM) signal corresponding to the input data; and 
 an RF signal generator that generates an RF signal using the PWM signal input from the clock output unit, 
 wherein the delay-locked loop includes:
 a charge pump that changes a current value to be output using the duty code, 
 a loop filter that converts the current value input from the charge pump into a voltage value and outputs the voltage value, 
 a voltage controlled delay line that outputs the delayed clock which is obtained by delaying the input reference clock in accordance with a voltage control signal, and 
 a phase/frequency detector that inputs an up signal or a down signal to the charge pump on the basis of the comparison result of the reference clock and the delayed clock in phase and frequency. 
 
 
     
     
       2. The NFC transmitter according to  claim 1 , wherein the duty ratio is in a range of 0% to 49%. 
     
     
       3. The NFC transmitter according to  claim 1 , wherein the PWM signal is a signal having a pulse width corresponding to an amplitude shift keying (ASK) depth of an NFC communication speed. 
     
     
       4. The NFC transmitter according to  claim 1 , wherein the RF signal generator changes an output current for transmitting the data to any value of 10 mA to 60 mA using a power code. 
     
     
       5. The NFC transmitter according to  claim 1 , wherein the clock output unit pulse-width modulates the input data including the high logic level and the low logic level and generates the PWM signal corresponding to the input data, such that the PWM signal includes a first waveform of the reference clock in a portion corresponding to either of the high logic level and the low logic level and a second waveform of the converted clock in a portion corresponding to the other of the high logic level and the low logic level. 
     
     
       6. A near field communication (NFC) transmission method comprising:
 (a) causing a delay-locked loop to output a reference clock and a delayed clock using the reference clock and a value of a duty code which are input; 
 (b) causing a clock output unit to receive the reference clock and the delayed clock, to output only the reference clock in either of a high logic level and a low logic level of input data, and to output a converted clock having a duty ratio using both the reference clock and the delayed clock in the other of the high logic level and the low logic level of the input data to generate a Pulse Width Modulation (PWM) signal corresponding to the input data; and 
 (c) causing an RF signal generator to generate an RF signal using the PWM signal input from the clock output unit, 
 wherein the step of (a) includes:
 causing a charge pump to change a current value to be output using the duty code, 
 causing a loop filter to convert the current value input from the charge pump into a voltage value and to output the voltage value, 
 causing a voltage controlled delay line to output the delayed clock which is obtained by delaying the input reference clock in accordance with a voltage control signal, and 
 causing a phase/frequency detector to input an up signal or a down signal to the charge pump on the basis of the comparison result of the reference clock and the delayed clock in phase and frequency. 
 
 
     
     
       7. The NFC transmission method according to  claim 6 , wherein the duty ratio is in a range of 0% to 49%. 
     
     
       8. The NFC transmission method according to  claim 6 , wherein the PWM signal is a signal having a pulse width corresponding to an amplitude shift keying (ASK) depth of an NFC communication speed. 
     
     
       9. The NFC transmission method according to  claim 6 , wherein the RF signal generator changes an output current for transmitting the data to any value of 10 mA to 60 mA using a power code. 
     
     
       10. The NFC transmission method according to  claim 6 , wherein the step of (b) includes modulating the input data including the high logic level and the low logic level and generating the PWM signal corresponding to the input data, such that the PWM signal includes a first waveform of the reference clock in a portion corresponding to either of the high logic level and the low logic level and a second waveform of the converted clock in a portion corresponding to the other of the high logic level and the low logic level.

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