Semiconductor memory device

Abstract

A semiconductor memory device according to an embodiment includes a memory cell array including memory cells, the memory cells each configured having a current rectifier element and a variable resistance element connected in series therein. Each of the memory cells has formed on aside surface thereof: a first insulating film provided on aside surface of the current rectifier element and the variable resistance element and having a composition ratio of a non-silicon element to silicon which is a first value; a silicon oxide film provided on a side surface of the first insulating film; and a second insulating film provided on aside surface of the silicon oxide film and having a composition ratio of a non-silicon element to silicon which is a second value. The first value is smaller than the second value.

What is claimed is: 
     
       1. A semiconductor memory device, comprising:
 a plurality of first lines disposed on a substrate; 
 a plurality of second lines disposed intersecting the first lines; 
 a memory cell array including memory cells, the memory cells disposed at each of intersections of the first lines and the second lines and each configured having a current rectifier element and a variable resistance element connected in series therein; and 
 a control circuit configured to selectively drive the first lines and the second lines, 
 each of the memory cells having formed on a side surface thereof: 
 a first insulating film including silicon and nitrogen and the first insulating film provided on a side surface of the current rectifier element and the variable resistance element and having a composition ratio of a non-silicon element to silicon which is a first value; 
 a silicon oxide film provided on a side surface of the first insulating film; and 
 a second insulating film including silicon and nitrogen and the second insulating film provided on a side surface of the silicon oxide film and having a composition ratio of a non-silicon element to silicon which is a second value, and 
 the first value being smaller than the second value. 
 
     
     
       2. The semiconductor memory device according to  claim 1 , wherein
 the first insulating film is a silicon nitride film where the first value is smaller than 1.33. 
 
     
     
       3. The semiconductor memory device according to  claim 1 , wherein
 the first insulating film is a silicon oxynitride film where the first value is smaller than 1.33. 
 
     
     
       4. The semiconductor memory device according to  claim 1 , wherein
 a film thickness of the first insulating film is thinner than a film thickness of the silicon oxide film or the second insulating film. 
 
     
     
       5. The semiconductor memory device according to  claim 1 , wherein
 the memory cell array is buried by an interlayer insulating film employing polysilazane. 
 
     
     
       6. The semiconductor memory device according to  claim 1 , wherein
 the first insulating film contacts a side surface of the memory cell, the silicon oxide film contacts a side surface of the first insulating film on an opposite side to the memory cell, and the second insulating film contacts a side surface of the silicon oxide film on an opposite side to the memory cell. 
 
     
     
       7. A semiconductor memory device, comprising:
 a plurality of first lines disposed on a substrate; 
 a plurality of second lines disposed intersecting the first lines; 
 a memory cell array including memory cells, the memory cells disposed at each of intersections of the first lines and the second lines and each configured having a current rectifier element and a variable resistance element connected in series therein; and 
 a control circuit configured to selectively drive the first lines and the second lines, 
 each of the memory cells having formed on a side surface thereof: 
 a first insulating film including silicon and nitrogen and the first insulating film provided on a side surface of the current rectifier element and the variable resistance element; 
 a silicon oxide film provided on a side surface of the first insulating film; and 
 a second insulating film including silicon and nitrogen and the second insulating film provided on a side surface of the silicon oxide film. 
 
     
     
       8. The semiconductor memory device according to  claim 7 , wherein
 the first insulating film is a silicon nitride film having a composition ratio of a non-silicon element to silicon which is smaller than 1.33. 
 
     
     
       9. The semiconductor memory device according to  claim 7 , wherein
 the first insulating film is a silicon oxynitride film having a composition ratio of a non-silicon element to silicon which is smaller than 1.33. 
 
     
     
       10. The semiconductor memory device according to  claim 7 , wherein
 a film thickness of the first insulating film is thinner than a film thickness of the silicon oxide film. 
 
     
     
       11. The semiconductor memory device according to  claim 7 , wherein
 a film thickness of the first insulating film is thinner than a film thickness of the second insulating film. 
 
     
     
       12. The semiconductor memory device according to  claim 7 , wherein
 the memory cell array is buried by an interlayer insulating film employing polysilazane. 
 
     
     
       13. The semiconductor memory device according to  claim 7 , wherein
 the first insulating film contacts a side surface of the memory cell, the silicon oxide film contacts a side surface of the first insulating film on an opposite side to the memory cell, and the second insulating film contacts a side surface of the silicon oxide film on an opposite side to the memory cell. 
 
     
     
       14. A semiconductor memory device, comprising:
 a plurality of first lines disposed on a substrate; 
 a plurality of second lines disposed intersecting the first lines; 
 a memory cell array including memory cells, the memory cells disposed at each of intersections of the first lines and the second lines and each configured having a current rectifier element and a variable resistance element connected in series therein; and 
 a control circuit configured to selectively drive the first lines and the second lines, 
 each of the memory cells having formed on a side surface thereof: 
 a first insulating film including silicon and nitrogen and the first insulating film provided on a side surface of the current rectifier element and the variable resistance element and having a first film thickness; 
 a silicon oxide film provided on a side surface of the first insulating film; and 
 a second insulating film including silicon and nitrogen and the second insulating film provided on a side surface of the silicon oxide film and having a second film thickness which is thicker than the first film thickness. 
 
     
     
       15. The semiconductor memory device according to  claim 14 , wherein
 the silicon oxide film has a third film thickness which is thicker than the first film thickness. 
 
     
     
       16. The semiconductor memory device according to  claim 14 , wherein
 the first insulating film is a silicon nitride film having a composition ratio of a non-silicon element to silicon which is smaller than 1.33. 
 
     
     
       17. The semiconductor memory device according to  claim 14 , wherein
 the first insulating film is a silicon oxynitride film having a composition ratio of a non-silicon element to silicon which is smaller than 1.33. 
 
     
     
       18. The semiconductor memory device according to  claim 14 , wherein
 the memory cell array is buried by an interlayer insulating film employing polysilazane. 
 
     
     
       19. The semiconductor memory device according to  claim 14 , wherein
 the first insulating film contacts a side surface of the memory cell, the silicon oxide film contacts a side surface of the first insulating film on an opposite side to the memory cell, and the second insulating film contacts a side surface of the silicon oxide film on an opposite side to the memory cell.