Control circuit employing follower circuit to control reference signal and related circuit control method

Abstract

A control circuit includes: a first current generating circuit arranged for generating at least one output current according to a reference signal; a second current generating circuit arranged for generating a reference current corresponding to the reference signal according to the reference signal; and a follower circuit coupled to the second current generating circuit for generating a control current according to the reference current, and feeding back the control current to the first current generating circuit from the second current generating circuit in a signal-following manner to control the reference signal.

What is claimed is: 
     
       1. A control circuit, comprising:
 a first current generating circuit, arranged for generating at least one output current according to a reference signal; 
 a second current generating circuit, arranged for generating a reference current corresponding to the output current according to the reference signal; and 
 a follower circuit, coupled to the second current generating circuit, for generating a control current according to the reference current, and feeding back the control current to the first current generating circuit from the second current generating circuit in a signal-following manner to control the reference signal. 
 
     
     
       2. The control circuit of  claim 1 , wherein the follower circuit comprises:
 a field effect transistor, having a control terminal coupled to a bias voltage, a first connection terminal coupled to the reference current, and a second connection terminal utilized to output the control current. 
 
     
     
       3. The control circuit of  claim 2 , wherein the field effect transistor is a common gate field effect transistor. 
     
     
       4. The control circuit of  claim 2 , wherein the field effect transistor is an N-type field effect transistor. 
     
     
       5. The control circuit of  claim 2 , wherein a capacitance of a first capacitor and a resistance of a first resistor both viewed by the second connection terminal of the field effect transistor are larger than a capacitance of a second capacitor and a resistance of a second resistor both viewed by the first connection terminal of the field effect transistor, respectively. 
     
     
       6. The control circuit of  claim 1 , wherein the second current generating circuit comprises:
 a first field effect transistor, having a control terminal coupled to the reference signal, a first connection terminal coupled to a first reference voltage, and a second connection terminal utilized to output the reference current; and 
 a first reference current source, having a first terminal coupled to the second connection terminal of the first field effect transistor and a second terminal coupled to a second reference voltage, for generating a first constant current. 
 
     
     
       7. The control circuit of  claim 6 , wherein the first field effect transistor is a P-type field effect transistor. 
     
     
       8. The control circuit of  claim 6 , wherein the follower circuit comprises:
 a second field effect transistor, having a control terminal coupled to a bias voltage, a first connection terminal coupled to the second connection terminal of the first field effect transistor, and a second connection terminal utilized to output the control current. 
 
     
     
       9. The control circuit of  claim 8 , wherein the second field effect transistor is an N-type field effect transistor. 
     
     
       10. The control circuit of  claim 6 , wherein the second current generating circuit further comprises:
 a second field effect transistor, having a control terminal coupled to a first bias voltage, a first connection terminal coupled to the second connection terminal of the first field effect transistor, and a second connection terminal coupled to the first terminal of the first reference current source to output the reference current. 
 
     
     
       11. The control circuit of  claim 10 , wherein the second field effect transistor is a P-type field effect transistor. 
     
     
       12. The control circuit of  claim 10 , wherein the follower circuit comprises:
 a third field effect transistor, having a control terminal coupled to a second bias voltage, a first connection terminal coupled to the second connection terminal of the second field effect transistor, and a second connection terminal utilized to output the control current. 
 
     
     
       13. The control circuit of  claim 12 , wherein the third field effect transistor is an N-type field effect transistor. 
     
     
       14. The control circuit of  claim 10 , further comprising:
 a reference signal generating circuit, coupled to the first current generating circuit and arranged to generate the reference signal and a second bias voltage. 
 
     
     
       15. The control circuit of  claim 14 , wherein the reference signal generating circuit comprises:
 a third field effect transistor, having a first connection terminal coupled to the first reference voltage, and a control terminal coupled to a second connection terminal to output the first bias voltage; 
 a second reference current source, having a first terminal coupled to the second connection terminal of the third field effect transistor and a second terminal coupled to the second reference voltage, for generating a second constant current; and 
 a fourth field effect transistor, having a first connection terminal coupled to the first reference voltage, a control terminal coupled to the control terminal of the third field effect transistor, and a first connection terminal utilized to output the reference signal. 
 
     
     
       16. The control circuit of  claim 15 , wherein the third field effect transistor and the fourth field effect transistor are both P-type field effect transistors. 
     
     
       17. A circuit control method, comprising:
 generating at least one output current according to a reference signal; 
 generating a reference current corresponding to the output current according to the reference signal; and 
 generating a control current according to the reference current, and feeding back the control current in a signal-following manner to control the reference signal.