Signal generating apparatus for generating power-on-reset signal

Abstract

A signal generating apparatus, for generating a power-on-reset signal, including a bias circuit and a power-on-reset signal generating circuit is disclosed. The bias circuit is for generating an output bias voltage, and includes at least one bipolar junction transistor (BJT), wherein a base terminal of the BJT is coupled to a collector terminal of the BJT, and the output bias voltage is related to an emitter-to-base voltage of the BJT. The power-on-reset signal generating circuit is coupled to the bias circuit, and is for generating a duplicated voltage by duplicating the output bias voltage, wherein the power-on-reset signal is generated according to the duplicated voltage.

What is claimed is: 
     
       1. A signal generating apparatus for generating a power-on-reset signal, comprising:
 a bias circuit for generating an output bias voltage, wherein the bias circuit comprises at least one bipolar junction transistor (BJT), a base terminal of the BJT is coupled to a collector terminal of the BJT, and the output bias voltage is related to an emitter-to-base voltage of the BJT; 
 a power-on-reset signal generating circuit comprising a duplication unit and a hysteresis unit, the duplication unit configured to generate a first voltage by substantially duplicating the output bias voltage, the hysteresis unit configured to receive the first voltage and generate a second voltage based on the first voltage; 
 a bandgap reference circuit, for generating a third voltage; and 
 a determination unit, coupled to the power-on-reset signal generating circuit and the bandgap reference circuit, the determination unit generating the power-on-reset signal according to the second voltage and the third voltage. 
 
     
     
       2. The signal generating apparatus of  claim 1 , wherein the bandgap reference circuit further comprises:
 a bandgap circuit for generating a reference voltage according to bandgap energy such that the reference voltage is insusceptible to environmental variation; 
 a voltage dividing circuit, for generating a comparison voltage according to a divided voltage of a supply voltage; and 
 a comparator, for generating the third voltage by comparing the reference voltage with the comparison voltage; 
 wherein the determination unit receives the third voltage and the second voltage as inputs. 
 
     
     
       3. The signal generating apparatus of  claim 1 , wherein the determination unit applies a logical AND operation to the second voltage and the third voltage to output the power-on-reset signal. 
     
     
       4. The signal generating apparatus of  claim 1 , wherein the duplication unit comprises a loading element and a current mirror, the current mirror being coupled to the loading element and the bias circuit for receiving the output bias voltage. 
     
     
       5. The signal generating apparatus of  claim 4 , wherein the current mirror comprises at least one transistor coupled to a supply voltage, the current mirror being configured to duplicate a current flowing via the bias circuit to generate a duplication current flowing via the loading element, wherein the first voltage is related to the duplication current and the loading element. 
     
     
       6. The signal generating apparatus of  claim 5 , wherein the current mirror comprises a pair of transistors coupled together via gate terminals of the pair of transistors. 
     
     
       7. The signal generating apparatus of  claim 6 , wherein the gate terminals are coupled directly to the output bias voltage. 
     
     
       8. The signal generating apparatus of  claim 7 , wherein source terminals of the transistor pair are coupled directly to the supply voltage. 
     
     
       9. The signal generating apparatus of  claim 8 , wherein the gate terminals are coupled to a drain terminal of one transistor of the pair of transistors. 
     
     
       10. The signal generating apparatus of  claim 9 , wherein a drain terminal of the other transistor of the pair of transistors outputs the first voltage. 
     
     
       11. A signal generating apparatus for generating a power-on-reset signal, comprising:
 a bias circuit for generating an output bias voltage, wherein the bias circuit comprises at least one bipolar junction transistor (BJT), a base terminal of the BJT is coupled to a collector terminal of the BJT, and the output bias voltage is related to an emitter-to-base voltage of the BJT; 
 a power-on-reset signal generating circuit comprising a duplication unit, the duplication unit configured to generate a first voltage by substantially duplicating the output bias voltage, the power-on-reset signal generating circuit configured to generate a second voltage based on the first voltage; 
 a bandgap reference circuit configured to generate third voltage; and 
 a determination unit configured to receive the second voltage and the third voltage, the determination unit being further configured to apply a logical AND operation to the second voltage and the third voltage to output the power-on-reset signal. 
 
     
     
       12. The signal generating apparatus of  claim 11 , wherein the bandgap reference circuit further comprises:
 a bandgap circuit for generating a bandgap reference voltage according to a bandgap energy; 
 a voltage dividing circuit, for generating a comparison voltage according to a divided voltage of a supply voltage; and 
 a comparator, for generating the third voltage by comparing the bandgap reference voltage with the comparison voltage. 
 
     
     
       13. The signal generating apparatus of  claim 11 , wherein the duplication unit comprises a loading element and a current mirror, the current mirror being coupled to the loading element and the bias circuit for receiving the output bias voltage, the current mirror comprising at least one transistor coupled to a supply voltage,
 wherein the current mirror is configured to duplicate a current flowing via the bias circuit to generate a duplication current flowing via the loading element, 
 wherein the first voltage is related to the duplication current and the loading element, 
 wherein the current mirror comprises a pair of transistors coupled together via gate terminals of the pair of transistors. 
 
     
     
       14. The signal generating apparatus of  claim 13 , wherein the gate terminals are coupled directly to the output bias voltage. 
     
     
       15. The signal generating apparatus of  claim 14 , wherein source terminals of the pair of transistors are coupled directly to the supply voltage. 
     
     
       16. The signal generating apparatus of  claim 15 , wherein the gate terminals are coupled to a drain terminal of one transistor of the pair of transistors. 
     
     
       17. A signal generating apparatus for generating a power-on-reset signal, comprising:
 a bias circuit comprising a bipolar junction transistor (BJT), the bias circuit being configured to generate an output bias voltage based on an emitter-to-base voltage of the BJT; 
 a power-on-reset signal generating circuit comprising a duplication unit configured to generate a first voltage by substantially duplicating the output bias voltage, the power-on-reset signal generating circuit configured to generate a second voltage based on the first voltage; 
 a bandgap reference circuit configured to generate a third voltage; and 
 a determination unit configured to output the power-on-reset signal based on the second voltage and the third voltage.