Current divider based voltage controlled gain amplifier
Abstract
An RF amplifier includes an input stage, a buffer stage, and an output stage. The input stage is configured to provide attenuation and impedance matching for an input radio frequency (RF) signal by providing shunt and series variable resistance current paths and RF power to RF current conversion. The input stage routes the RF current between the current paths resulting in an attenuation of the RF input current. The buffer stage is configured to provide an intermediate RF current which tracks the current level of the attenuated RF input current, thereby providing isolation between the input and output stages. The output stage is configured to provide RF current to RF power conversion, utilizing the intermediate RF current to provide an RF signal having an RF output power proportional to the RF input power.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1. An amplifier, comprising:
an input stage configured to extract a first radio frequency (RF) current having a first RF current level from an RF input signal having an input power level, the input stage including
a shunting current path including a first variable resistance element, the shunting current path being configured to shunt a portion of the RF input signal to a ground, and
a series current path including a second variable resistance element, the series current path being configured to attenuate the RF input signal and provide the first RF current; and
a buffer stage configured to regulate a second current level of a second RF current to substantially track the first RF current level; and
an output stage configured to convert the second RF current to an RF output signal having an output power level, the output power level being proportional to the input power level,
wherein the input stage is further configured to substantially maintain a predetermined input impedance for variations in the first RF current level.
2. The amplifier of claim 1 , wherein the buffer stage comprises:
a transistor having a first terminal, a second terminal, and a third terminal, wherein the transistor is configured to regulate the current level of the second RF current in response to a bias signal applied at the first terminal.
3. The amplifier of claim 1 , wherein:
the shunting current path comprises a first resistor coupled in series with the first variable resistance element, and
the series current path comprises a second resistor coupled in series with the second variable resistance element.
4. The amplifier of claim 1 , wherein the input impedance is a combination of a resistance of the shunting current path and the series current path.
5. The amplifier of claim 4 , further comprising:
an impedance control module configured to provide first and second impedance control signals,
wherein the second impedance control signal is an input gain control signal,
wherein the first impedance control signal is generated in response to the input gain control signal, and
wherein the resistance of the shunting current path and the series current path are adjusted in response to the first impedance control signal and the input gain control signal, respectively, such that the resistance of the series current path compensates for changes in the resistance of the shunting current path to maintain the input impedance for variations in the resistance of the series current path.
6. The amplifier of claim 5 , wherein the impedance control module comprises:
a comparator having a first input, a second input, and an output;
a first current path coupled between the second input and the ground forming a feedback path between the output and the second input:
a second current path coupled between the second input and the ground; and
a third current path including a resistor determined based on the predetermined input impedance, the third current path being coupled between the first input and the ground.
7. The amplifier of claim 6 ,
wherein the first and second current paths include first and second transistors, respectively,
wherein the input gain control signal adjusts an impedance of the second transistor, and
wherein the comparator is further configured to generate the first impedance control signal at the output to adjust an impedance of the first transistor to compensate for changes in the impedance of the second transistor such that an impedance at the second input is maintained substantially equal to an impedance at the first input for variations in the impedance of the first transistor, the impedance at the first input being the predetermined impedance.
8. An amplifier, comprising:
an input stage having an input impedance determined by a plurality of current paths and configured to route first and second radio frequency (RF) currents extracted from an RF input signal through the plurality of current paths so as to provide first and second attenuated RF currents, and to maintain the input impedance substantially at a predetermined impedance over variations in current levels of the first and second attenuated RF currents:
a buffer stage configured to provide first and second intermediate RF currents having current levels that substantially track the current levels of the first and second attenuated RF currents, respectively; and
an output stage configured to convert the first and second intermediate RF currents to an RF output signal having a power level proportional to a power level of the RF input signal.
9. The amplifier of claim 8 , wherein the RF input signal is a differential RF signal having first and second complementary RF signals, and wherein the first and second RF currents are associated with the first and second complementary RF signals, respectively.
10. The amplifier of claim 9 , wherein the input stage is further configured to receive the first and second complementary RF signals via first and second terminals, respectively, and wherein the plurality of current paths comprise:
a shunting current path coupled between the first and second terminals, the shunting current path including a first variable resistance element;
a first series current path coupled to the first terminal, the first series current path including a second variable resistance element; and
a second series current path coupled to the second terminal, the second series current path including a third variable resistance element, and
wherein the input impedance is a combination of a resistance of the shunting current path and the first and second series current paths.
11. The amplifier of claim 10 , wherein the buffer stage comprises:
a first transistor having a first terminal, the first transistor being coupled to the first series current path and configured to regulate the first intermediate RF current level in response to a bias signal applied at the first terminal; and
a second transistor having a second terminal, the second transistor being coupled to the second series current path and configured to regulate the second intermediate RF current level in response to the bias signal applied at the second terminal.
12. The amplifier of claim 11 , further comprising:
an impedance control module configured to provide first, second, and third impedance control signals,
wherein the first and second impedance control signals are a single input gain control signal,
wherein the third impedance control signal is generated in response to the input gain control signal, and
wherein a resistance of the first, second, and third variable resistance elements is adjusted in response to the first, second, and third impedance control signals, respectively, such that the resistance of the first and second series current paths compensates for changes in the resistance of the shunting current path to maintain the input impedance for variations in the resistance of the shunting current path.
13. The amplifier of claim 12 , wherein the impedance control module comprises:
a comparator having a first input, a second input, and an output;
a first current path including a fourth variable resistance element coupled between the second input and a ground forming a feedback path between the output and the second input;
a second current path including a fifth variable resistance element coupled between the second input and the ground; and
a third current path including a resistor representative of the predetermined impedance, the third current path being coupled between the first input and the ground.
14. The amplifier of claim 13 , wherein the first, second, third, fourth, and fifth variable resistances are first, second, third, fourth, and fifth transistors, respectively,
wherein the input gain control signal adjusts an impedance of the fifth transistor, and
wherein the comparator is further configured to generate the third impedance control signal at the output to adjust an impedance of the fourth transistor to compensate for changes in the impedance of the fifth transistor such that an impedance at the second input is maintained substantially equal to an impedance at the first input for variations in the impedance of the fourth transistor, the impedance at the first input being the predetermined impedance.
15. The amplifier of claim 10 , wherein:
the shunting current path comprises a first resistance coupled in series with the first variable resistance element,
the first series current path comprises a second resistance coupled in series with the second variable resistance element, and
the second series current path comprises a third resistance coupled in series with the third variable resistance element.
16. An amplifier, comprising:
an input radio frequency (RF) terminal configured to receive an RF input signal having an RF input current and an RF input power level;
a shunting current path including a first variable resistance element, the shunting current path configured to shunt a portion of the RF input current to a ground;
a series current path including a second variable resistance element, the series current path configured to attenuate the RF input current to provide an attenuated RF current having an attenuated current level;
an impedance control module configured to adjust an impedance of the first and second variable resistance elements so as to substantially maintain an input impedance of the RF input terminal for variations in the attenuated current level;
a current regulating element configured to provide an intermediate RF current having a current level which substantially tracks the attenuated current level; and
a current to power conversion module configured to convert the intermediate RF current to an RF output signal having an output power level proportional to the RF input power level.
17. The amplifier of claim 16 , wherein:
the impedance control module is further configured to provide first and second impedance control signals,
the input impedance is a combination of a resistance of the shunting current path and the series current path,
the second impedance control signal is an input gain control signal,
the first impedance control signal is generated in response to the input gain control signal, and
a resistance of the first and second variable resistance elements is adjusted in response to the input gain control signal and the second control signal, respectively such that the resistance of the series current path compensates for changes in the resistance of the shunting current path to maintain the input impedance for variations in the resistance of the shunting current path.
18. The amplifier of claim 17 , wherein the impedance control module comprises:
a comparator having a first input, a second input, and an output;
a first current path including a third variable resistance element coupled between the second input and a ground forming a feedback path between the output and the second input;
a second current path including a fourth variable resistance element coupled between the second input and the ground,
a third current path including a resistor determined based on a predetermined impedance, the third current path being coupled between the first input and the ground.
19. The amplifier of claim 18 , wherein the first, second, third, and fourth variable resistance elements include first, second, third, and fourth transistors, respectively, and
wherein the comparator is further configured to generate the first impedance control signal at the output to adjust an impedance of the first transistor to compensate for changes in an impedance of the second transistor such that an impedance at the second input is maintained substantially equal to an impedance at the first input for variations in the impedance of the first transistor, the impedance at the first input being the predetermined impedance.
20. The amplifier of claim 1 , further comprising: an impedance control module configured to adjust an impedance of the first and second variable resistance elements so as to substantially maintain the predetermined input impedance for variations of the RF input current level.Cited by (0)
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