P
US9101009B2ActiveUtilityPatentIndex 50

Circuit arrangement for operating N parallel-connected strings having at least one semiconductor light source

Assignee: OSRAM GMBHPriority: Dec 21, 2012Filed: Dec 5, 2013Granted: Aug 4, 2015
Est. expiryDec 21, 2032(~6.5 yrs left)· nominal 20-yr term from priority
Inventors:OSTERRIED JOSEF
H05B 45/20H05B 45/46H05B 45/37H05B 33/0806H05B 33/0815H05B 33/086H05B 33/0827H05B 45/325
50
PatentIndex Score
1
Cited by
9
References
12
Claims

Abstract

A circuit arrangement may include an input for coupling to a supply voltage; n semiconductor light source units comprising a driver device; wherein the units are coupled in parallel, wherein each driver device comprises a PWM controller. A respective controller is designed to provide a PWM signal at a respectively predefinable frequency to a control electrode of a respective converter switch. The arrangement includes current measuring devices which are designed for measuring the current through a respective string having at least one semiconductor light source; and a control device having control outputs, wherein each controller has a clock input, wherein a respective control output is coupled to a respective clock input of the controllers, wherein the control device is designed to provide clock signals at its control outputs, said clock signals being phase-shifted by 360°/n with respect to one another.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
       1. A circuit arrangement for operating n parallel-connected strings having at least one semiconductor light source, where n is greater than or equal to 2, the circuit arrangement comprising:
 an input having a first input terminal and a second input terminal for coupling to a DC supply voltage; 
 n semiconductor light source units comprising in each case a driver device and an output for coupling to at least one string having at least one semiconductor light source; 
 wherein the n semiconductor light source units are coupled in parallel between the first input terminal and the second input terminal, wherein each driver device comprises a PWM controller having a drive output and also a converter, wherein each converter comprises at least one inverter inductance, a converter diode and a converter switch having a control electrode, a working electrode and a reference electrode, wherein the drive output of the respective PWM controller is coupled to the control electrode of the respective converter switch, wherein the output of the respective converter is coupled to the output of the respective semiconductor light source unit, wherein the respective PWM controller is designed to provide a PWM signal at a respectively predefinable frequency to the control electrode of the respective converter switch; and 
 n current measuring devices which are designed and arranged for measuring the current through a respective one of the n strings having at least one semiconductor light source, wherein each current measuring device is coupled to the respectively associated driver device; and 
 a control device having n control outputs, wherein each PWM controller has a clock input, wherein a respective control output is coupled to a respective clock input of the n PWM controllers, wherein the control device is designed to provide n clock signals at its n control outputs, said clock signals being phase-shifted by 360°/n with respect to one another. 
 
     
     
       2. The circuit arrangement of  claim 1 , wherein the converter comprises a step-up converter or a step-down converter. 
     
     
       3. The circuit arrangement of  claim 2 , wherein the respective PWM controller is designed to provide, in response to a clock signal at its clock input, a corresponding output signal to the control electrode of the respective converter switch, wherein the duty cycle of the PWM signal is determined by the current measured by the respective current measuring device. 
     
     
       4. The circuit arrangement of  claim 3 , wherein the respective PWM controller is designed to provide, in response to a clock signal at its clock input, a corresponding output signal as a rising or a falling edge, or an edge delayed by a predefinable time duration, of a PWM signal, to the control electrode of the respective converter switch, wherein the duty cycle of the PWM signal is determined by the current measured by the respective current measuring device. 
     
     
       5. The circuit arrangement of  claim 1 , wherein an electronic switch is coupled in series with each output, such that the current through the respective string having at least one semiconductor light source can be switched on and off. 
     
     
       6. The circuit arrangement of  claim 1 , wherein the control device constitutes a clock generator. 
     
     
       7. The circuit arrangement of  claim 6 , wherein the clock generator is realized as a microcontroller. 
     
     
       8. The circuit arrangement of  claim 1 , wherein the control device constitutes an oscillator with downstream phase shifter. 
     
     
       9. The circuit arrangement of  claim 1 , wherein the control device is integrated in one of the driver devices, such that said one driver device constitutes a master and the other driver devices constitute slaves. 
     
     
       10. The circuit arrangement of  claim 9 , wherein the control device is integrated in the PWM controller of the driver device. 
     
     
       11. The circuit arrangement of  claim 1 , wherein at least one capacitor is connected in parallel with each string having at least one semiconductor light source. 
     
     
       12. The circuit arrangement of  claim 1 , wherein the semiconductor light source constitutes an light emitting diode or a laser diode.

Cited by (0)

No later patents cite this yet.

References (0)

No backward citations on record.