US9112162B2ActiveUtilityA1

Electronic device and electronic device manufacturing method

51
Assignee: PANASONIC CORPPriority: Mar 26, 2013Filed: Nov 24, 2014Granted: Aug 18, 2015
Est. expiryMar 26, 2033(~6.7 yrs left)· nominal 20-yr term from priority
H10K 10/466H10D 30/6755H10D 86/423H10D 86/0241H10D 86/60H10D 30/67H01L 29/786H01L 27/3246H01L 51/0545H01L 51/0036H01L 51/5088H10K 10/472H10K 71/13H10K 85/311H10K 59/125H10K 59/122H10K 85/113H10K 50/17
51
PatentIndex Score
0
Cited by
20
References
11
Claims

Abstract

An electronic device including: a substrate; a bank formed on an upper surface of the substrate, surrounding an area of the upper surface of the substrate, and defining an aperture from which the area is exposed; a liquid-philic layer formed on a peripheral portion of the area, and not overlapping a central portion of the area; a semiconductor layer formed within the aperture, and attaching to at least a portion of the central portion and to an upper surface of the liquid-philic layer; and a pair of electrodes that are in contact with an area of the semiconductor layer, the area of the semiconductor layer not overlapping the liquid-philic layer in plan view. The bank has a liquid-phobic lateral surface surrounding the aperture, and the upper surface of the liquid-philic layer has a higher degree of liquid-philicity than the upper surface of the substrate.

Claims

exact text as granted — not AI-modified
The invention claimed is: 
     
       1. An electronic device comprising:
 a substrate; 
 a bank formed on an upper surface of the substrate, surrounding an area of the upper surface of the substrate, and defining an aperture from which the area of the upper surface is exposed; 
 a liquid-philic layer formed on a peripheral portion of the area of the upper surface of the substrate, and not overlapping a central portion of the area of the upper surface of the substrate, the peripheral portion surrounding the central portion; 
 a semiconductor layer formed within the aperture, and attaching to at least a portion of the central portion and to an upper surface of the liquid-philic layer; and 
 a pair of electrodes that are in contact with an area of the semiconductor layer, the area of the semiconductor layer not overlapping the liquid-philic layer in plan view, wherein 
 the bank has a liquid-phobic lateral surface surrounding the aperture, and 
 the upper surface of the liquid-philic layer has a higher degree of liquid-philicity than the upper surface of the substrate. 
 
     
     
       2. The electronic device of  claim 1 , wherein
 at least one of the pair of electrodes is formed on the upper surface of the substrate. 
 
     
     
       3. The electronic device of  claim 2 , wherein
 said at least one of the pair of electrodes is separated from the liquid-philic layer, and 
 the liquid-philic layer includes a same material as said at least one of the pair of electrodes. 
 
     
     
       4. The electronic device of  claim 2 , wherein
 the liquid-philic layer has a same film thickness as said at least one of the pair of electrodes. 
 
     
     
       5. The electronic device of  claim 2 , wherein
 the liquid-philic layer has a smaller film thickness than said at least one of the pair of electrodes. 
 
     
     
       6. The electronic device of  claim 1 , wherein
 the pair of electrodes is composed of a source electrode and a drain electrode, and is formed on the upper surface of the substrate or on an upper surface of the semiconductor layer, with an interval therebetween. 
 
     
     
       7. The electronic device of  claim 6 , wherein
 the source electrode and the drain electrode are formed on the upper surface of the substrate. 
 
     
     
       8. The electronic device of  claim 6 , wherein
 the substrate is a laminate including a base, a gate electrode formed on the base, and a gate insulation layer covering the gate electrode, and 
 the source electrode and the drain electrode are formed on an upper surface of the gate insulation layer. 
 
     
     
       9. The electronic device of  claim 1 , wherein
 one of the pair of electrodes is formed on the central portion of the area of the upper surface of the substrate, and 
 the other one of the pair of electrodes is formed on a portion of an upper surface of the semiconductor layer, the portion of the upper surface of the semiconductor layer overlapping the central portion of the area of the upper surface of the substrate in plan view. 
 
     
     
       10. An electronic device manufacturing method comprising:
 preparing a substrate; 
 forming a bank on an upper surface of the substrate, the bank surrounding an area of the upper surface of the substrate, defining an aperture from which the area of the upper surface is exposed, and having a liquid-phobic lateral surface surrounding the aperture; 
 forming a liquid-philic layer on a peripheral portion of the area of the upper surface of the substrate, the liquid-philic layer not overlapping a central portion of the area of the upper surface of the substrate, the peripheral portion surrounding the central portion, and the liquid-philic layer having a higher degree of liquid-philicity than the upper surface of the substrate; 
 forming a semiconductor layer attaching to at least a portion of the central portion and to an upper surface of the liquid-philic layer; and 
 forming a pair of electrodes that are in contact with an area of the semiconductor layer, the area not overlapping the liquid-philic layer in plan view. 
 
     
     
       11. The electronic device manufacturing method of  claim 10 , wherein
 at least one of the pair of electrodes is formed on the upper surface of the substrate, and is separated from the liquid-philic layer, and 
 the liquid-philic layer is formed simultaneously with said at least one of the pair of electrodes.

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