US9118338B2ActiveUtilityA1

Offset compensation circuit and method thereof

49
Assignee: NAT APPLIED RES LABORATORIESPriority: Dec 13, 2013Filed: Feb 7, 2014Granted: Aug 25, 2015
Est. expiryDec 13, 2033(~7.4 yrs left)· nominal 20-yr term from priority
H03M 1/06H03F 3/45748H03F 3/456H03F 3/45183H03F 2203/45514H03F 3/45753H03F 3/45192H03F 2203/45212H03F 2200/321
49
PatentIndex Score
1
Cited by
5
References
13
Claims

Abstract

A current-steering offset compensation circuit is configured for compensating an offset caused by process variation or environment variation of a signal processor. The signal processor includes a pair of differential input terminals and a pair of differential output terminals. The current-steering offset compensation circuit comprises a current-steering circuit connected with the signal processor, a digital control unit which generates a digital control signal according to the outputs from the pair of differential output terminals of the signal processor, and a digital-to-analog converter which receives the digital control signal and outputs a control voltage, wherein the current-steering circuit receives the control voltage, so as to steer the current of the pair of differential input terminals, to reduce the offset in the signal processor.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
       1. A current-steering offset compensation circuit for compensating a differential offset of a signal processor, which includes a pair of differential input terminals and a pair of differential output terminals, comprising:
 a current-steering circuit connected with the signal processor; 
 a digital control unit which generates a digital control signal according to outputs from the pair of differential output terminals of the signal processor; and 
 a digital-to-analog converter which receives the digital control signal and outputs a control voltage, 
 wherein the current-steering circuit receives the control voltage, so as to control a correction current; and 
 wherein the current-steering circuit includes an input stage for receiving the control voltage and an output stage coupled with the input stage for generating the correction current according to the control voltage. 
 
     
     
       2. The current-steering offset compensation circuit as claimed in  claim 1 , further comprising a comparator for receiving the outputs of the pair of differential output terminals, and generating a comparison signal to the digital control unit, wherein the digital control unit generates the digital control signal according to the comparison signal. 
     
     
       3. The current-steering offset compensation circuit as claimed in  claim 2 , wherein the digital control unit stops generating the digital control signal when a state transition occurs in the comparison signal of the comparator. 
     
     
       4. The current-steering offset compensation circuit as claimed in  claim 3 , wherein the comparison signal is composed of either “0” or “1”. 
     
     
       5. The current-steering offset compensation circuit as claimed in  claim 1 , further comprising a low pass filter for receiving the outputs of the pair of differential output terminals, and outputting low frequency differential signals to the digital control unit, wherein the digital control unit generates the digital control signal according to the low frequency differential signals. 
     
     
       6. The current-steering offset compensation circuit as claimed in  claim 1 , wherein the signal processor includes an operational amplifier. 
     
     
       7. The current-steering offset compensation circuit as claimed in  claim 1 , wherein the input stage of the current-steering circuit includes a first transistor and a second transistor, and the output stage of the current-steering circuit includes a third transistor coupled with the first transistor and a fourth transistor coupled with the second transistor, when a voltage outputted by a positive terminal of the pair of the differential output terminals is greater than a voltage outputted by a negative terminal of the pair of the differential output terminals, the first transistor of the input stage is turned on by receiving the control voltage, and thus the third transistor coupled with the first transistor outputs the correction current having a first value according to the control voltage; when the voltage outputted by the negative terminal of the pair of the differential output terminals is greater than the voltage outputted by the positive terminal of the pair of the differential output terminals, the second transistor of the input stage is turned on by receiving the control voltage, and thus the fourth transistor coupled with the second transistor outputs the correction current having a second value according to the control voltage. 
     
     
       8. The current-steering offset compensation circuit as claimed in  claim 1 , wherein when the signal processor receives outputs from a plurality of pair of differential output terminals, the digital control unit correspondingly generates a plurality of digital control signals, and the digital control unit stores the plurality of digital control signals for compensating the outputs of the pair of differential output terminals in a time-division multiplexing manner. 
     
     
       9. A method for compensating an offset of a signal processor, the signal processor including a pair of differential input terminals and a pair of differential output terminals, comprising a current-steering offset compensation circuit for compensating an offset of the signal processor, and the current-steering offset compensation circuit including a current-steering circuit comprising an input stage and an output stage coupled with the input stage, a digital control unit, and a digital-to-analog converter, the method comprising the following steps:
 S 10 : generating a digital control signal by the digital control unit according to outputs from the pair of differential output terminals of the signal processor; 
 S 20 : receiving the digital control signal by the digital-to-analog converter, and outputting a control voltage; and 
 S 30 : turning on the input stage of the current-steering circuit by receiving the control voltage, so as to control a correction current by the output stage coupled with the input stage according to the control voltage. 
 
     
     
       10. The method for compensating an offset as claimed in  claim 9 , wherein the current-steering offset compensation circuit further includes a comparator, the method further comprising the following step before S 10 :
 S 40 : generating a comparison signal by the comparator according to the outputs from the pair of differential output terminals of the signal processor. 
 
     
     
       11. The method for compensating an offset as claimed in  claim 10 , wherein the digital control unit stops generating the digital control signal when a state transition occurs in the comparison signal of the comparator. 
     
     
       12. The method for compensating an offset as claimed in  claim 10 , wherein the current-steering offset compensation circuit further includes a low pass filter, the method further comprising the following step before S 40 :
 S 50 : differential outputting low frequency differential signals by the low pass filter according to the outputs from the pair of differential output terminals of the signal processor. 
 
     
     
       13. The method for compensating an offset as claimed in  claim 9 , wherein the input stage includes a first transistor and a second transistor, and the output stage includes a third transistor coupled with the first transistor and a fourth transistor coupled with the second transistor; when a voltage outputted by a positive terminal of the pair of the differential output terminals is greater than a voltage outputted by a negative terminal of the pair of the differential output terminals, the first transistor is turned on by the receiving the control voltage, and thus the third transistor coupled with the first transistor outputs the correction current having a first value according to the control voltage; when the voltage outputted by the negative terminal of the pair of the differential output terminals is greater than the voltage outputted by the positive terminal of the pair of the differential output terminals, the second transistor is turned on by receiving the control voltage, and thus the fourth transistor coupled with the second transistor outputs the correction current having a second value according to the control voltage.

Cited by (0)

No later patents cite this yet.

References (0)

No backward citations on record.