Semiconductor device

Abstract

A semiconductor device includes a first semiconductor layer provided over a substrate; an electron transit layer contacting a top of the first semiconductor layer; and a second semiconductor layer contacting a top of the electron transit layer, wherein the electron transit layer has a dual quantum well layer having a structure where a first well layer, an intermediate barrier layer, and a second well layer are sequentially stacked, an energy of a conduction band of the intermediate barrier layer is lower than an energy of conduction band of the first semiconductor layer and the second semiconductor layer, and a ground level is generated in the first and second well layers, and a first excitation level is generated in the dual quantum well layer.

What is claimed is: 
     
       1. A semiconductor device, comprising:
 a first semiconductor layer provided over a substrate; an electron transit layer contacting a top of the first semiconductor layer; and 
 a second semiconductor layer contacting a top of the electron transit layer, 
 wherein the electron transit layer has a dual quantum well layer comprising a structure where a first well layer, an intermediate barrier layer, and a second well layer are sequentially stacked, 
 wherein an energy of a conduction band of the intermediate barrier layer is lower than an energy of conduction band of the first semiconductor layer and the second semiconductor layer, 
 wherein a ground level is generated in the first and second well layers, and a first excitation level is generated in the dual quantum well layer, and 
 wherein electrons in the ground level exist having a single peak in each of the first well layer and the second well layer and electrons in the first excitation level exist having a single peak in each of the first well layer and the second well layer. 
 
     
     
       2. The semiconductor device according to  claim 1 , wherein the first well layer and the second well layer include a semiconductor of a same material and composition. 
     
     
       3. The semiconductor device according to  claim 1 , wherein the first well layer and the second well layer include semiconductors of different materials and compositions. 
     
     
       4. The semiconductor device according to  claim 1 , wherein the dual quantum well layer has a structure where a lower barrier layer, the first well layer, the intermediate barrier layer, the second well layer, and an upper barrier layer are sequentially stacked. 
     
     
       5. The semiconductor device according to  claim 4 , wherein the lower barrier layer, the intermediate barrier layer, and the upper barrier layer include a semiconductor of a same material and composition. 
     
     
       6. The semiconductor device according to  claim 4 , wherein the lower barrier layer, the intermediate barrier layer, and the upper barrier layer include semiconductors of different materials and compositions. 
     
     
       7. The semiconductor device according to  claim 1 , wherein the first well layer and the second well layer have a higher indium (In) content than the intermediate barrier layer. 
     
     
       8. The semiconductor device according to  claim 1 , wherein:
 the first semiconductor layer and the second semiconductor layer include InAlAs, 
 the intermediate barrier layer includes InGaAs, and 
 the first well layer and the second well layer include InAs. 
 
     
     
       9. The semiconductor device according to  claim 1 , wherein:
 the first semiconductor layer and the second semiconductor layer include InAlAs, 
 the intermediate barrier layer includes InGaAs, and 
 the first well layer and the second well layer include InGaAs that has a higher indium (In) content than that in InGaAs in the intermediate barrier layer. 
 
     
     
       10. The semiconductor device according to  claim 8 , wherein:
 the dual quantum well layer has a structure where a lower barrier layer, the first well layer, the intermediate barrier layer, the second well layer, and an upper barrier layer are sequentially stacked, and 
 the lower barrier layer and the upper barrier layer include InGaAs. 
 
     
     
       11. The semiconductor device according to  claim 9 , wherein:
 the dual quantum well layer has a structure where a lower barrier layer, the first well layer, the intermediate barrier layer, the second well layer, and an upper barrier layer are sequentially stacked, and 
 the lower barrier layer and the upper barrier layer include InGaAs. 
 
     
     
       12. The semiconductor device according to  claim 10 , wherein the lower barrier layer, the intermediate barrier layer, and the upper barrier layer include InGaAs of a same composition. 
     
     
       13. The semiconductor device according to  claim 10 , wherein the lower barrier layer, the intermediate barrier layer, and the upper barrier layer include InGaAs of different compositions. 
     
     
       14. The semiconductor device according to  claim 1 , wherein:
 the first semiconductor layer and the second semiconductor layer include AlGaAs, 
 the intermediate barrier layer includes GaAs, and 
 the first well layer and the second well layer include InGaAs. 
 
     
     
       15. The semiconductor device according to  claim 14 , wherein:
 the dual quantum well layer has a structure where a lower barrier layer, the first well layer, the intermediate barrier layer, the second well layer, and an upper barrier layer are sequentially stacked, and 
 the lower barrier layer and the upper barrier layer include GaAs. 
 
     
     
       16. The semiconductor device according to  claim 1 , wherein at least one of the first semiconductor layer and the second semiconductor layer define an electron supply layer. 
     
     
       17. A semiconductor device, comprising:
 a first semiconductor layer provided over a substrate; an electron transit layer contacting a top of the first semiconductor layer: and 
 a second semiconductor layer contacting a top of the electron transit layer, 
 wherein the electron transit layer has a dual quantum well layer comprising a structure where a first well layer, an intermediate barrier layer, and a second well layer are sequentially stacked, 
 wherein an energy of a conduction band of the intermediate barrier layer is lower than an energy of conduction band of the first semiconductor layer and the second semiconductor layer, 
 wherein a ground level is generated in the first and second well layers, and a first excitation level is generated in the dual quantum well layer, and 
 wherein: 
 the first semiconductor layer and the second semiconductor layer include AlGaAs, 
 the intermediate barrier layer includes InGaAs, and 
 the first well layer and the second well layer include InGaAs that has a higher indium (In) content than that in InGaAs in the intermediate barrier layer. 
 
     
     
       18. The semiconductor device according to  claim 17 , wherein:
 the dual quantum well layer has a structure where a lower barrier layer, the first well layer, the intermediate barrier layer, the second well layer, and an upper barrier layer are sequentially stacked, and 
 the lower barrier layer and the upper barrier layer include InGaAs. 
 
     
     
       19. The semiconductor device according to  claim 18 , wherein the lower barrier layer, the intermediate barrier layer, and the upper barrier layer include InGaAs of a same composition. 
     
     
       20. The semiconductor device according to  claim 18 , wherein the lower barrier layer, the intermediate barrier layer, and the upper barrier layer include InGaAs of different compositions.