US9154092B2ActiveUtilityA1

Amplification circuit of semiconductor apparatus

52
Assignee: SK HYNIX INCPriority: Aug 30, 2013Filed: Dec 9, 2013Granted: Oct 6, 2015
Est. expiryAug 30, 2033(~7.1 yrs left)· nominal 20-yr term from priority
Inventors:Mun Seon Jang
H03F 2203/45674H03F 3/45183H03F 3/45
52
PatentIndex Score
1
Cited by
1
References
23
Claims

Abstract

An amplification circuit of a semiconductor apparatus includes a first amplification unit configured to amplify a difference between an input voltage and a reference voltage and generate a preliminary amplification signal, a second amplification unit configured to secondarily amplify the preliminary amplification signal and generate an amplification signal, and a compensation unit configured to form an addition current path.

Claims

exact text as granted — not AI-modified
What is claimed is:  
     
       1. An amplification circuit of a semiconductor apparatus, comprising:
 a first amplification unit configured to amplify a difference between an input voltage and a reference voltage and generate a preliminary amplification signal; 
 a second amplification unit configured to secondarily amplify the preliminary amplification signal and generate an amplification signal; and 
 a compensation unit configured to form an addition current path in response to an active signal. 
 
     
     
       2. The amplification circuit of a semiconductor apparatus according to  claim 1 , wherein the first amplification unit is configured to change an operating current in response to a standby mode signal and the active signal. 
     
     
       3. The amplification circuit of a semiconductor apparatus according to  claim 1 , wherein the compensation unit is configured to compensate for a difference between an output operating point, which defines a level of the preliminary amplification signal when the input voltage is equal to the reference voltage, and a threshold voltage level of the second amplification unit through the additional current path. 
     
     
       4. The amplification circuit of a semiconductor apparatus according to  claim 1 , wherein the compensation unit comprises:
 a first diode; 
 a first switch configured to electrically couple the first diode to a current path of the first amplification unit, in response to activation of the active signal; 
 a second diode; and 
 a second switch configured to electrically couple the second diode to the current path of the first amplification unit, in response to the activation of the active signal. 
 
     
     
       5. An amplification circuit of a semiconductor apparatus, comprising:
 a differential-input and single-ended amplifier configured to amplify a voltage difference between a first current path and a second current path and generate a preliminary amplification signal; 
 a single-input and single-ended amplifier configured to secondarily amplify the preliminary amplification signal and generate an amplification signal; and 
 a compensation unit configured to form a third current path and a fourth current path in response to an active signal. 
 
     
     
       6. The amplification circuit of a semiconductor apparatus according to  claim 5 , wherein the differential-input and single-ended amplifier is configured to change an operating current in response to a standby mode signal and the active signal. 
     
     
       7. The amplification circuit of a semiconductor apparatus according to  claim 5 , wherein the differential-input and single-ended amplifier comprises:
 the first current path having a current amount that is controlled by an input voltage; and 
 the second current path having a current amount that is controlled by a reference voltage. 
 
     
     
       8. The amplification circuit of a semiconductor apparatus according to  claim 7 , wherein an operating current of the first current path is configured to be changed in response to a standby mode signal and the active signal. 
     
     
       9. The amplification circuit of a semiconductor apparatus according to  claim 7 , wherein an operating current of the second current path is configured to be changed in response to a standby mode signal and the active signal. 
     
     
       10. The amplification circuit of a semiconductor apparatus according to  claim 5 , wherein the compensation unit comprises:
 the third current path electrically coupled to the first current path; and 
 the fourth current path electrically coupled to the second current path. 
 
     
     
       11. The amplification circuit of a semiconductor apparatus according to  claim 10 , wherein the third current path comprises:
 a diode; and 
 a switch configured to electrically couple the diode to the first current path in response to activation of the active signal. 
 
     
     
       12. The amplification circuit of a semiconductor apparatus according to  claim 10 , wherein the fourth current path comprises:
 a diode; and 
 a switch configured to electrically couple the diode to the second current path in response to activation of the active signal. 
 
     
     
       13. The amplification circuit of a semiconductor apparatus according to  claim 7 , wherein the compensation unit is configured to compensate for a difference between an output operating point, which defines a level of the preliminary amplification signal when the input voltage is substantially equal to the reference voltage, and a threshold voltage level of the single-input and single-ended amplifier through the third current path and the fourth current path. 
     
     
       14. An amplification circuit of a semiconductor apparatus, comprising:
 a first amplification unit configured to consume an operating current in a standby mode that is lower than another operating current in a activation mode; 
 a second amplification unit configured to generate an amplification signal by inverting a preliminary amplification signal; and 
 a compensation unit configured to form one or more current paths in the first amplification unit in the activation mode. 
 
     
     
       15. The amplification circuit of  claim 14 , wherein the first amplification unit is configured with a plurality of transistors wherein at least one of the plurality of transistors has a lower current drivability than an other of the plurality of transistors. 
     
     
       16. The amplification circuit of  claim 14 , wherein the compensation unit is configured to add additional current paths to increase an amount of current of the first amplification unit. 
     
     
       17. The amplification circuit of  claim 14 , wherein a preliminary amplification signal is generated by a difference in an amount of current between the one or more current paths. 
     
     
       18. The amplification circuit of  claim 14 , wherein the second amplification unit amplifies the preliminary amplification signal to compensate for a reduction in power supply voltage and voltage gain. 
     
     
       19. The amplification circuit of  claim 15 , wherein the first amplification unit amplifies a difference between an input voltage and a reference voltage by using the operating current of one of the plurality of transistors. 
     
     
       20. The amplification circuit of  claim 14 , wherein the first amplification unit is configured to change one or more operating currents in the standby mode and the activation mode. 
     
     
       21. The amplification circuit of  claim 1 , wherein the active signal is activated when the semiconductor apparatus performs a data read or write operation. 
     
     
       22. The amplification circuit of  claim 5 , wherein the active signal is activated when the semiconductor apparatus performs a data read or write operation. 
     
     
       23. The amplification circuit of  claim 14 , wherein the activation mode, the semiconductor apparatus performs a data read or write operation.

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