US9209311B2ActiveUtilityA1
Thin film transistor and method for manufacturing the same
Est. expirySep 4, 2029(~3.2 yrs left)· nominal 20-yr term from priority
H10D 30/6713H10D 30/6704H10D 30/6755H10D 99/00H01L 29/66969H01L 29/7869B82Y 10/00
90
PatentIndex Score
17
Cited by
61
References
23
Claims
Abstract
According to one embodiment, a thin film transistor includes a gate electrode, a semiconductor layer, a gate insulating film, and a source electrode and a drain electrode. The semiconductor layer includes an oxide including at least one of gallium and zinc, and indium. The gate insulating film is provided between the gate electrode and the semiconductor layer. The source electrode and a drain electrode are electrically connected to the semiconductor layer and spaced from each other. The semiconductor layer includes a plurality of fine crystallites dispersed three-dimensionally in the semiconductor layer and has periodicity in arrangement of atoms.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1. A method for manufacturing a thin film transistor including:
a gate electrode;
a semiconductor layer provided facing the gate electrode, including an oxide including at least one of gallium and zinc, and indium, and including a plurality of fine crystallites dispersed three-dimensionally and having periodicity in arrangement of atoms;
a gate insulating film provided between the gate electrode and the semiconductor layer; and
a source electrode and a drain electrode electrically connected to the semiconductor layer and spaced from each other,
the method comprising:
forming the gate electrode on a major surface of a substrate, forming the gate insulating film made of a silicon oxide film on the gate electrode, forming an oxide film including indium and at least one of gallium and zinc on the gate insulating film, and forming a channel protection layer made of a silicon oxide film on the oxide film so that the oxide film is covered with the channel protection layer to form a stacked film of the gate electrode, the gate insulating film, the oxide film, and the channel protection layer;
forming the fine crystallites in the oxide film by heat treatment of the stacked film at 320° C. or more and 380° C. or less in a furnace; and
forming the source electrode and the drain electrode so as to be connected to the oxide film, the forming the source electrode and the drain electrode being performed after the forming the fine crystallites,
the forming the fine crystallites being performed in a state in which a lower surface of the oxide film is covered with the gate insulating film and an upper surface of the oxide film is covered with the channel protection layer,
wherein the fine crystallites are dispersed uniformly in the oxide film,
wherein a particle diameter of the fine crystallites is 5 nanometers or less,
wherein the oxide film does not include crystallites having a diameter larger than 5 nanometers,
wherein the semiconductor layer includes a first region overlapping the gate electrode in a direction perpendicular to the major surface, a second region overlapping the source electrode in the direction, and a third region overlapping the drain electrode in the direction,
wherein an average particle diameter of the fine crystallites having the particle diameter of 2 nanometers or more among the plurality of fine crystallites is 3.5 nanometers or less in each of the first, second, and third regions, and
wherein oxygen concentrations in the first, second, and third regions are same.
2. The method according to claim 1 , wherein the forming the fine crystallites is performed in a nitrogen atmosphere.
3. The method according to claim 1 , wherein the forming the gate insulating film includes performing at least one of a chemical mechanical polishing processing, an RIE processing, and an argon sputtering processing to flatten a surface of the gate insulating film.
4. A method for manufacturing a thin film transistor including:
a gate electrode;
a semiconductor layer provided facing the gate electrode, including an oxide including at least one of gallium and zinc, and indium, and including a plurality of fine crystallites dispersed three-dimensionally and having periodicity in arrangement of atoms;
a gate insulating film provided between the gate electrode and the semiconductor layer; and
a source electrode and a drain electrode electrically connected to the semiconductor layer and spaced from each other,
the method comprising:
forming an oxide film including indium and at least one of gallium and zinc on a major surface of a substrate, forming the gate insulating film made of a silicon oxide film on the oxide film so that the oxide film is covered with the gate insulating film, forming the gate electrode on the gate insulating film to form a stacked film of the oxide film, the gate insulating film, and the gate electrode;
forming the fine crystallites in the oxide film by heat treatment of the stacked film at 320° C. or more and 380° C. or less in a furnace; and
forming the source electrode and the drain electrode so as to be connected to the oxide film,
the forming the fine crystallites being performed in a state in which the oxide film is covered with the gate insulating film,
wherein the fine crystallites are dispersed uniformly in the oxide film,
wherein a particle diameter of the fine crystallites is 5 nanometers or less,
wherein the oxide film does not include crystallites having a diameter larger than 5 nanometers,
wherein the semiconductor layer includes a first region overlapping the gate electrode in a direction perpendicular to the major surface, a second region overlapping the source electrode in the direction, and a third region overlapping the drain electrode in the direction,
wherein an average particle diameter of the fine crystallites having the particle diameter of 2 nanometers or more among the plurality of fine crystallites is 3.5 nanometers or less in each of the first, second, and third regions, and
wherein oxygen concentrations in the first, second, and third regions are same.
5. The method according to claim 4 , wherein the forming the fine crystallites is performed in a nitrogen atmosphere.
6. The method according to claim 4 , further comprising flattening the major surface of the substrate before forming the oxide film.
7. A method for manufacturing a display including:
a thin film transistors including:
a gate electrode;
a semiconductor layer provided facing the gate electrode, including an oxide including at least one of gallium and zinc, and indium, and including a plurality of fine crystallites dispersed three-dimensionally and having periodicity in arrangement of atoms;
a gate insulating film provided between the gate electrode and the semiconductor layer; and
a source electrode and a drain electrode electrically connected to the semiconductor layer and spaced from each other;
a pixel electrode connected to one of the drain electrode and the source electrode; and
an optical element producing at least one of a change in optical characteristics and light emitting in response to an electrical signal applied to the pixel electrode;
the method comprising:
forming the gate electrode on a major surface of a substrate, forming the gate insulating film made of a silicon oxide film on the gate electrode, forming an oxide film including indium and at least one of gallium and zinc on the gate insulating film, and forming a channel protection layer made of a silicon oxide film on the oxide film so that the oxide film is covered with the channel protection layer to form a stacked film of the gate electrode, the gate insulating film, the oxide film and the channel protection layer;
forming the fine crystallites in the oxide film by heat treatment of the stacked film at 320° C. or more and 380° C. or less in a furnace; and
forming the source electrode and the drain electrode so as to be connected to the oxide film, the forming the source electrode and the drain electrode being performed after the forming the fine crystallites,
the forming the fine crystallites being performed in a state in which a lower surface of the oxide film is covered with the gate insulating film and an upper surface of the oxide film is covered with the channel protection layer,
wherein the fine crystallites are dispersed uniformly in the oxide film,
wherein a particle diameter of the fine crystallites is 5 nanometers or less,
wherein the oxide film does not include crystallites having a diameter larger than 5 nanometers,
wherein the semiconductor layer includes a first region overlapping the gate electrode in a direction perpendicular to the major surface, a second region overlapping the source electrode in the direction, and a third region overlapping the drain electrode in the direction,
wherein an average particle diameter of the fine crystallites having the particle diameter of 2 nanometers or more among the plurality of fine crystallites is 3.5 nanometers or less in each of the first, second, and third regions, and
wherein oxygen concentrations in the first, second, and third regions are same.
8. The method according to claim 7 , wherein the forming the fine crystallites is performed in a nitrogen atmosphere.
9. The method according to claim 7 , wherein the forming the gate insulating film includes performing at least one of a chemical mechanical polishing processing, an RIE processing, and an argon sputtering processing to flatten a surface of the gate insulating film.
10. A method for manufacturing a display including:
a thin film transistors including:
a gate electrode;
a semiconductor layer provided facing the gate electrode, including an oxide including at least one of gallium and zinc, and indium, and including a plurality of fine crystallites dispersed three-dimensionally and having periodicity in arrangement of atoms;
a gate insulating film provided between the gate electrode and the semiconductor layer; and
a source electrode and a drain electrode electrically connected to the semiconductor layer and spaced from each other;
a pixel electrode connected to one of the drain electrode and the source electrode; and
an optical element producing at least one of a change in optical characteristics and light emitting in response to an electrical signal applied to the pixel electrode;
the method comprising:
forming an oxide film including indium and at least one of gallium and zinc on a major surface of a substrate, forming the gate insulating film made of a silicon oxide film on the oxide film so that the oxide film is covered with the gate insulating film, forming the gate electrode on the gate insulating film to form a stacked film of the oxide film, the gate insulating film and the gate electrode;
forming the fine crystallites in the oxide film by heat treatment of the stacked film at 320° C. or more and 380° C. or less in a furnace; and
forming the source electrode and the drain electrode so as to be connected to the oxide film, the forming the source electrode and the drain electrode being performed after the forming the fine crystallites,
the forming the fine crystallites being performed in a state in which the oxide film is covered with the gate insulating film,
wherein the fine crystallites are dispersed uniformly in the oxide film,
wherein a particle diameter of the fine crystallites is 5 nanometers or less,
wherein the oxide film does not include crystallites having a diameter larger than 5 nanometers,
wherein the semiconductor layer includes a first region overlapping the gate electrode in a direction perpendicular to the major surface, a second region overlapping the source electrode in the direction, and a third region overlapping the drain electrode in the direction,
wherein an average particle diameter of the fine crystallites having the particle diameter of 2 nanometers or more among the plurality of fine crystallites is 3.5 nanometers or less in each of the first, second, and third regions, and
wherein oxygen concentrations in the first, second, and third regions are same.
11. The method according to claim 10 , wherein the forming the fine crystallites is performed in a nitrogen atmosphere.
12. The method according to claim 10 , further comprising flattening the major surface of the substrate before forming the oxide film.
13. The method according to claim 1 , wherein the forming the oxide film is performed in an atmosphere including oxygen and argon, and an argon concentration in the atmosphere is higher than an oxygen concentration in the atmosphere.
14. The method according to claim 13 , wherein the forming the oxide film is performed by a sputtering method.
15. The method according to claim 7 , wherein the forming the oxide film is performed in an atmosphere including oxygen and argon, and an argon concentration in the atmosphere is higher than an oxygen concentration in the atmosphere.
16. The method according to claim 15 , wherein the forming the oxide film is performed by a sputtering method.
17. The method according to claim 10 , wherein the forming the oxide film is performed in an atmosphere including oxygen and argon, and an argon concentration in the atmosphere is higher than an oxygen concentration in the atmosphere.
18. The method according to claim 17 , wherein the forming the oxide film is performed by a sputtering method.
19. The method according to claim 4 , wherein the forming the oxide film is performed in an atmosphere including oxygen and argon, and an argon concentration in the atmosphere is higher than an oxygen concentration in the atmosphere.
20. The method according to claim 13 , wherein a proportion of oxygen is not more than 5% relative to argon.
21. The method according to claim 15 , wherein a proportion of oxygen is not more than 5% relative to argon.
22. The method according to claim 17 , wherein a proportion of oxygen is not more than 5% relative to argon.
23. The method according to claim 19 , wherein a proportion of oxygen is not more than 5% relative to argon.Cited by (0)
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