Wideband bias circuits and methods

Abstract

The present disclosure includes circuits and methods for wideband biasing. In one embodiment, an amplifiers includes a cascode transistor between an input and an output of the amplifier. The cascode transistor receives a bias from a bias circuit comprising a resistor between the power supply and a first node, a resistor between the first node and a reference voltage, and a capacitor between the power supply and the first node. The power supply may be a modulated power supply, which is coupled through the bias circuit to a capacitance at the control terminal of the cascode transistor. An inductor is configured between a terminal of the cascode transistor and the power supply. The inductor may isolate the output from the modulated supply signal.

What is claimed is: 
     
       1. An amplifier circuit comprising:
 a first transistor having a control terminal, a first terminal, and a second terminal, the control terminal configured to receive an input signal; 
 a first cascode transistor having a control terminal, a first terminal, and a second terminal, wherein the second terminal of the first cascode transistor is coupled to the first terminal of the first transistor; 
 an inductor having a first terminal coupled to the first terminal of the first cascode transistor and a second terminal coupled to a modulated power supply terminal; 
 a first resistor having a first terminal coupled to the modulated power supply terminal and a second terminal coupled to a first node; 
 a second resistor having a first terminal coupled to the first node and a second terminal coupled to a reference voltage; 
 a first capacitor having a first terminal coupled to the modulated power supply terminal and a second terminal coupled to the first node; 
 a second cascode transistor having a control terminal, a first terminal, and a second terminal, wherein the first terminal of the second cascode transistor is coupled to the second terminal of the first cascode transistor, and wherein the second terminal of the second cascode transistor is coupled to the first terminal of the first transistor; 
 a third resistor having a first terminal coupled to the modulated power supply terminal and a second terminal coupled to a second node; 
 a fourth resistor having a first terminal coupled to the second node and a second terminal coupled to the reference voltage; and 
 a second capacitor having a first terminal coupled to the modulated power supply terminal and a second terminal coupled to the second node, 
 wherein the first node is coupled to the control terminal of the first cascode transistor, wherein the second node is coupled to the control terminal of the second cascode transistor, and wherein the modulated power supply terminal produces a time varying power supply signal corresponding to the input signal. 
 
     
     
       2. The circuit of  claim 1  wherein the control terminal of the first cascode transistor comprises a capacitance. 
     
     
       3. The circuit of  claim 2  wherein the first resistor, the second resistor, and the first capacitor are configured to couple the time varying power supply signal to the control terminal of the first cascode device across a first range of frequencies greater than a second range of frequencies of the input signal. 
     
     
       4. The circuit of  claim 1  wherein a first product of a resistance of the first resistor and a capacitance of the first capacitor is approximately equal to a second product of a resistance of the second resistor and a capacitance at the control terminal of the first cascode transistor. 
     
     
       5. The circuit of  claim 1  wherein the inductor isolates the first terminal of the cascode transistor from the time varying power supply signal on the second terminal of the inductor. 
     
     
       6. The circuit of  claim 1  wherein a bandwidth of the input signal is less than a bandwidth of the time varying power supply signal. 
     
     
       7. The circuit of  claim 1  wherein at least one of the first resistor, the second resistor, and the first capacitor are programmable. 
     
     
       8. An amplifier circuit comprising:
 a first transistor having a control terminal, a first terminal, and a second terminal, the control terminal configured to receive an input signal; 
 a cascode transistor having a control terminal, a first terminal, and a second terminal, wherein the second terminal of the cascode transistor is coupled to the first terminal of the first transistor; 
 an inductor having a first terminal coupled to the first terminal of the cascode transistor and a second terminal coupled to a modulated power supply terminal; 
 a first resistor having a first terminal coupled to the modulated power supply terminal and a second terminal coupled to a first node; 
 a second resistor having a first terminal coupled to the first node and a second terminal coupled to a reference voltage; and 
 a capacitor having a first terminal coupled to the modulated power supply terminal and a second terminal coupled to the first node, 
 wherein the first node is coupled to the control terminal of the cascode transistor, and wherein the modulated power supply terminal produces a time varying power supply signal corresponding to the input signal, and 
 further comprising a third resistor coupled between the first node and the control terminal of the cascode transistor. 
 
     
     
       9. A method of amplifying a signal comprising:
 receiving an input signal on a control terminal of a first transistor, the first transistor having the control terminal, a first terminal, and a second terminal; 
 coupling the input signal through the first transistor, a second cascode transistor, and a first cascode transistor to produce an output signal on a first terminal of the first cascode transistor, the first cascode transistor having a control terminal, the first terminal, and a second terminal, wherein the second terminal of the first cascode transistor is coupled to the first terminal of the first transistor; 
 receiving a time varying power supply voltage from a modulated power supply on a terminal of a first bias circuit, the first bias circuit comprising a first resistor having a first terminal coupled to a modulated power supply terminal and a second terminal coupled to a first node, a second resistor having a first terminal coupled to the first node and a second terminal coupled to a reference voltage, and a first capacitor having a first terminal coupled to the modulated power supply terminal and a second terminal coupled to the first node, wherein the first node is coupled to the control terminal of the first cascode transistor; 
 receiving the time varying power supply voltage from the modulated power supply on a terminal of a second bias circuit, the second bias circuit comprising a third resistor having a first terminal coupled to the modulated power supply terminal and a second terminal coupled to a second node, a fourth resistor having a first terminal coupled to the second node and a second terminal coupled to the reference voltage, and a second capacitor having a first terminal coupled to the modulated power supply terminal and a second terminal coupled to the second node, wherein the second node is coupled to a control terminal of the second cascode transistor; and 
 coupling the time varying power supply voltage to the control terminal of the first cascode transistor; 
 coupling the time varying power supply voltage to the control terminal of the second cascode transistor; and 
 generating an impedance in an inductor having a first terminal coupled to the first terminal of the first cascode transistor and a second terminal coupled to the modulated power supply terminal to isolate the first terminal of the first cascode transistor from the time varying power supply voltage. 
 
     
     
       10. The method of  claim 9  wherein the control terminal of the first cascode transistor comprises a capacitance. 
     
     
       11. The method of  claim 10  wherein the first resistor, the second resistor, and the first capacitor are configured to couple the time varying power supply voltage to the control terminal of the first cascode transistor across a first range of frequencies greater than a second range of frequencies of the input signal. 
     
     
       12. The method of  claim 9  wherein a first product of a resistance of the first resistor and a capacitance of the first capacitor is approximately equal to a second product of a resistance of the second resistor and a capacitance at the control terminal of the first cascode transistor. 
     
     
       13. The method of  claim 9  wherein a bandwidth of the input signal is less than a bandwidth of the time varying power supply voltage. 
     
     
       14. The method of  claim 9  wherein at least one of the first resistor, the second resistor, and the first capacitor are programmable. 
     
     
       15. A method of amplifying a signal comprising:
 receiving an input signal on a control terminal of a first transistor, the first transistor having a control terminal, the first terminal, and a second terminal; 
 coupling the input signal through the first transistor and a cascode transistor to produce an output signal on a first terminal of the cascode transistor, the cascode transistor having a control terminal, the first terminal, and a second terminal, wherein the second terminal of the cascode transistor is coupled to the first terminal of the first transistor; 
 receiving a time varying power supply voltage from a modulated power supply on a terminal of a bias circuit, the bias circuit comprising a first resistor having a first terminal coupled to a modulated power supply terminal and a second terminal coupled to a first node, a second resistor having a first terminal coupled to the first node and a second terminal coupled to a reference voltage, and a capacitor having a first terminal coupled to the modulated power supply terminal and a second terminal coupled to the first node, wherein the first node is coupled to the control terminal of the cascode transistor; 
 generating an impedance in an inductor having a first terminal coupled to the first terminal of the cascode transistor and a second terminal coupled to the modulated power supply terminal to isolate the first terminal of the cascode transistor from the time varying power supply voltage; and 
 coupling the time varying power supply voltage to the control terminal of the cascode transistor through a third resistor coupled between the first node and the control terminal of the cascode transistor. 
 
     
     
       16. An amplifier circuit comprising:
 a first transistor having a control terminal, a first terminal, and a second terminal, the control terminal configured to receive an input signal; 
 a cascode transistor having a control terminal, a first terminal, and a second terminal, wherein the second terminal is coupled to the first terminal of the first transistor; 
 an inductor having a first terminal coupled to the first terminal of the cascode transistor and a second terminal coupled to a modulated power supply terminal; and 
 means for coupling a maximum frequency of a time varying power supply signal corresponding to the input signal from the modulated power supply terminal to the control terminal of the cascode transistor to bias the cascode transistor, said means for coupling the maximum frequency of the time varying power supply signal comprising:
 a first resistor having a first terminal coupled to the modulated power supply terminal and a second terminal coupled to a first node; 
 a second resistor having a first terminal coupled to the first node and a second terminal coupled to a reference voltage; 
 a capacitor having a first terminal coupled to the modulated power supply terminal and a second terminal coupled to the first node; 
 a third resistor coupled between the first node and the control terminal of the cascode transistor; and 
 a capacitance corresponding to the control terminal of the cascode transistor.