Preventing voltage pulse propagation in a disabled capacitive feedback slew-controlled switch

Abstract

Transient voltages are not propagated through a P-channel MOSFET used as a switch with output slew rate control feedback, by connecting a low or near-zero impedance across the source and gate terminals of the device whenever the MOSFET is supposed to be off. The low or near-zero impedance is provided by a second P-channel MOSFET connected across the source and gate of the MOSFET switch.

The invention claimed is: 
     
       1. A switching circuit, configured to prevent or at least reduce transient voltage propagation through a semiconductor switch, the output voltage slew rate of which is controlled using capacitive feedback, the switching circuit comprising:
 a three-terminal semiconductor switch having a first input terminal, which is configured to be coupled to a voltage source, a first output terminal configured to be coupled to a load, and a first control terminal; 
 a turn off circuit having a second input terminal coupled to the first input terminal, a second output terminal coupled to the first control terminal, and a second control terminal coupled to an on/off terminal for the switching circuit; and 
 a slew rate controlled turn on circuit having a third input terminal coupled to the first output terminal, a third output terminal coupled to the first control terminal, and a third control input terminal coupled to the on/off terminal. 
 
     
     
       2. The switching circuit of  claim 1 , wherein the semiconductor switch, the turn off circuit, and the turn on circuit are configured such that:
 a first, high voltage provided to the on/off terminal configures the turn off circuit to have a high impedance and configures the slew-controlled turn on circuit to couple the first control terminal to a reference potential; and 
 a second, low voltage provided to the on/off terminal configures the turn off circuit to have a low impedance and configures the slew-rate controlled turn on circuit to de-couple the first control terminal from said reference potential. 
 
     
     
       3. The switching circuit of  claim 1 , wherein the three-terminal semiconductor switch comprises a P-channel metal oxide semiconductor field effect transistor (MOSFET) having a first source, first drain and first gate, the first source being the first input terminal, the first drain being the first output terminal, and wherein the turn off circuit comprises a P-channel MOSFET having a second source, second drain, and second gate, the second source being coupled to the first source, the second drain being coupled to the first gate, the second gate being coupled to the on/off terminal, and wherein the slew-controlled turn on circuit comprises a capacitor connected to the first drain and first gate. 
     
     
       4. The switching circuit of  claim 1 , wherein the slew-controlled turn on circuit further comprises:
 an N-channel MOSFET having a drain coupled to the first control terminal, a source coupled to a reference potential, and a gate coupled to the on/off terminal; 
 wherein a positive gate-source voltage on the N-channel MOSFET causes the N-channel MOSFET and the three-terminal semiconductor switch to conduct current and, a zero or negative gate-source voltage causes the N-channel MOSFET and three-terminal semiconductor switch to turn off and additionally causes the turn-off circuit to suppress conduction of transient voltages through the three-terminal semiconductor switch. 
 
     
     
       5. The switching circuit of  claim 1 , wherein the semiconductor switch, the turn off circuit, and the turn on circuit are configured such that, a first signal provided to the on/off terminal disables the low-input impedance turn off circuit and turns on the slew-controlled turn on circuit, wherein a second and different signal from the on/off terminal causes the low-input impedance turn off circuit to provide a low impedance across the first input terminal and first control terminal. 
     
     
       6. The switching circuit of  claim 1 , wherein the three-terminal semiconductor switch comprises a P-channel metal oxide semiconductor field effect transistor (MOSFET) having a first source, first drain, and first gate, the first terminal being the first source, the first output being the first drain, wherein the low input impedance turn off circuit comprises a P-channel MOSFET having a second source, second drain, and second gate, the second source being coupled to the first source, the second drain being coupled to the first gate, the second gate being coupled to the on/off terminal, and wherein the slew-controlled turn on circuit comprises a capacitor connected to the first drain and first gate. 
     
     
       7. The switching circuit of  claim 1 , wherein the slew-controlled turn on circuit further comprises:
 an N-channel MOSFET having a drain coupled to the first control terminal, a source coupled to a reference potential, and a gate coupled to the on/off terminal. 
 
     
     
       8. The switching circuit of  claim 1 , further comprising a vehicle battery coupled to the input terminal. 
     
     
       9. The switching circuit of  claim 1 , further comprising a power supply coupled to the input terminal. 
     
     
       10. A method of suppressing transient voltage propagation through a first, three-terminal semiconductor switch having a first input coupled to a voltage source, a first output, and a first control, the first semiconductor switch being configured to control the flow of current by providing a low impedance between the first input and first output in an on state and a high impedance between the first input and first output in an off state, the semiconductor switch having an output slew rate controlled by a capacitor coupled between the first output and first control, the method comprising:
 providing a low impedance across the first input and the first control, when the semiconductor switch is in an off state; 
 when the semiconductor switch is in an on state, providing a high impedance across the first input and the first control. 
 
     
     
       11. The method of  claim 10 , wherein the first semiconductor switch is provided with a second, three-terminal semiconductor switch having a second input coupled to a voltage source, a second output, and a second control, the second semiconductor switch being configured to control the flow of current by providing a low impedance between the second input and the second output in an on state and a high impedance between the second input and the second output in an off state, the second input being coupled to the first input, the second output being coupled to the first control, wherein the step of providing a low impedance comprises:
 applying a voltage to the second control, which causes the second semiconductor switch to provide a substantially zero impedance across the first input and the first control and thereby apply a voltage from the voltage source to the first control. 
 
     
     
       12. The method of  claim 10 , wherein the first and second three-terminal semiconductor switches are first and second P-channel MOSFET transistors, respectively, and wherein the step of providing a low impedance across the first input and the first control comprises applying a zero or negative-valued gate-source voltage to the second P-channel MOSFET, the step of providing a high impedance across the first input and the first control comprises applying a positive-valued gate source voltage to the second P-channel MOSFET. 
     
     
       13. The method of  claim 10 , further comprising a transistor which is coupled to the second, three-terminal semiconductor switch, the transistor having a second input, a second output, and a second control, the second input being coupled to the first input, the second output being coupled to the first control, wherein the step of providing a high impedance comprises:
 applying a voltage to the second control, which causes the second semiconductor switch to provide a high resistance across the first input and the first control and disconnect the voltage from the voltage source from the first control.