Crack stop barrier and method of manufacturing thereof

Abstract

A wafer is disclosed. The wafer comprises a plurality of chips and a plurality of kerfs. A kerf of the plurality of kerfs separates one chip from another chip. The kerf comprises a crack stop barrier.

What is claimed is: 
     
       1. A wafer comprising:
 a kerf junction comprising a first kerf and second kerf, the first kerf having a first main direction and the second kerf having a second main direction, the first kerf separating a first chip and a second chip on a first side of the second kerf and the first kerf separating a third chip and a fourth chip on a second side of the second kerf; 
 a first continuous crack stop barrier having a third direction, wherein the third direction is different than the first main direction, wherein the first continuous crack stop barrier is located in the kerf junction, and wherein the first continuous crack stop barrier extends over a width of the first kerf but does not connect to the first chip and the second chip; 
 a second continuous crack stop barrier having a fourth direction, wherein the fourth direction is different than the first main direction, wherein the second continuous crack stop barrier is located in the kerf junction, and wherein the second continuous crack stop barrier extends over the width of the first kerf but does not connect to the third chip and the fourth chip; and 
 a third continuous crack stop barrier having a fifth direction, wherein the fifth direction is different than the second main direction, wherein the third continuous crack stop barrier is located in the kerf junction, and wherein the third continuous crack stop barrier extends across a majority but not the entire width of the second kerf. 
 
     
     
       2. The wafer of  claim 1 , wherein the third direction and the fourth direction are parallel to the second main direction. 
     
     
       3. The wafer of  claim 1 , wherein the kerf junction further comprises a test feature. 
     
     
       4. The wafer of  claim 3 , wherein the test feature is parallel to the second main direction, and wherein the test feature is larger than a width of the second kerf. 
     
     
       5. The wafer of  claim 3 , wherein the test feature is an optical alignment structure. 
     
     
       6. The wafer of  claim 3 , wherein the test feature is a process control monitoring (pcm) structure. 
     
     
       7. The wafer of  claim 3 , wherein the test feature is a reliability control monitoring (rcm) structure. 
     
     
       8. The wafer of  claim 1 , wherein the first continuous crack stop barrier comprises a saw-tooth line. 
     
     
       9. The wafer of  claim 1 , wherein the first continuous crack stop barrier extends across a majority but not the entire width of the first kerf. 
     
     
       10. The wafer of  claim 1 , wherein the first continuous crack stop barrier is larger than the width of the first kerf. 
     
     
       11. The wafer of  claim 1 , wherein the first continuous crack stop barrier comprises a cube type structure. 
     
     
       12. The wafer of  claim 1 , wherein the first continuous crack stop barrier comprises a pyramid type structure. 
     
     
       13. The wafer of  claim 1 , further comprising a fourth continuous crack stop barrier having a sixth direction, wherein the sixth direction is different than the second main direction, wherein the fourth continuous crack stop barrier is located in the kerf junction, and wherein the third continuous crack stop barrier extends across a majority but not the entire width of the second kerf. 
     
     
       14. The wafer of  claim 13 , wherein the fifth direction and the sixth direction are parallel to the first main direction. 
     
     
       15. A wafer comprising:
 a kerf junction comprising a first kerf and second kerf, the first kerf having a first main direction and the second kerf having a second main direction, the first kerf separating a first chip and a second chip on a first side of the second kerf and the first kerf separating a third chip and a fourth chip on a second side of the second kerf; and 
 a first continuous crack stop barrier having a third direction, wherein the third direction is different than the first main direction, wherein the first continuous crack stop barrier is located in the kerf junction, and wherein the first continuous crack stop barrier extends over a width of the first kerf but does not connect to the first chip and the second chip; 
 a second continuous crack stop barrier having a fourth direction, wherein the fourth direction is different than the first main direction, wherein the second continuous crack stop barrier is located in the kerf junction, and wherein the second continuous crack stop barrier extends over the width of the first kerf but does not connect to the third chip and the fourth chip; 
 a third continuous crack stop barrier having a fifth direction, wherein the fifth direction is different than the second main direction, wherein the third continuous crack stop barrier is located in the kerf junction, and wherein the third continuous crack stop barrier does not cross over the first continuous crack stop barrier or the second continuous crack stop barrier; and 
 a fourth continuous crack stop barrier having a sixth direction, wherein the sixth direction is different than the second main direction, wherein the fourth continuous crack stop barrier is located in the kerf junction, and wherein the fourth continuous crack stop barrier does not cross over the first continuous crack stop barrier or the second continuous crack stop barrier, 
 wherein the first to fourth continuous crack stop barrier comprise solid material structures in an isolation layer stack. 
 
     
     
       16. The wafer of  claim 15 , wherein the third direction and the fourth direction are parallel to the second main direction, and wherein the fifth direction and the sixth direction are parallel to the first main direction.