US9257408B2ActiveUtilityA1
Semiconductor device and method of manufacturing the same
Est. expiryNov 21, 2032(~6.4 yrs left)· nominal 20-yr term from priority
H10W 90/754H10W 90/734H10W 74/00H10W 72/07554H10W 72/07536H10W 72/07523H10W 72/07323H10W 72/5475H10W 72/5473H10W 72/5445H10W 72/5438H10W 72/884H10W 72/352H10W 72/075H10W 72/073H10W 70/611H10W 70/69H10W 70/65H10W 46/607H10W 46/301H10W 90/00H10W 76/60H10W 74/117H10W 74/111H10W 74/01H10W 70/60H10W 46/00H10W 40/255H10W 42/60H01L 2224/49175H01L 24/85H01L 2224/8513H01L 2223/54486H01L 2924/20656H01L 23/60H01L 2224/49113H01L 2224/85132H01L 24/83H01L 2224/85801H01L 2224/32225H01L 2224/45099H01L 2224/92247H01L 2224/29101H01L 2924/00012H01L 2224/49111H01L 23/544H01L 21/56H01L 23/3107H01L 23/49894H01L 25/072H01L 23/10H01L 24/73H01L 2224/73265H01L 2224/83132H01L 23/12H01L 2224/4846H01L 24/92H01L 24/32H01L 23/5386H01L 24/29H01L 24/49H01L 2924/00014H01L 23/3128H01L 2924/014H01L 2224/4917H01L 23/3735H01L 24/48H01L 25/18H01L 25/07H01L 2223/54426H01L 2224/48227
39
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Cited by
12
References
3
Claims
Abstract
A soldering portion ( 4 ) and a Ni plating mark ( 5 ) are simultaneously forming by plating on a wiring pattern ( 2 ) of an insulating substrate ( 1 ). A semiconductor chip ( 6 ) is mounted on the insulating substrate ( 1 ). A position of the insulating substrate ( 1 ) is recognized by the Ni plating mark ( 5 ) and a wire ( 7 ) is bonded to the semiconductor chip ( 6 ). An electrode ( 8 ) is joined to the soldering portion ( 4 ) by solder ( 9 ). The insulating substrate ( 1 ), the semiconductor chip ( 6 ), the wire ( 7 ), and the electrode ( 8 ) are encapsulated in an encapsulation material ( 13 ).
Claims
exact text as granted — not AI-modifiedThe invention claimed is:
1. A method of manufacturing a semiconductor device comprising:
simultaneously forming a soldering portion and a mark by plating on a wiring pattern of an insulating substrate;
mounting a semiconductor chip on the insulating substrate;
recognizing a position of the insulating substrate by the mark and bonding a wire to the semiconductor chip;
joining an electrode to the soldering portion by a solder; and
encapsulating the insulating substrate, the semiconductor chip, the wire, and the electrode in an encapsulation material.
2. A method of manufacturing a semiconductor device comprising:
forming a soldering portion and a mark on a wiring pattern of an insulating substrate;
mounting a semiconductor chip on the insulating substrate;
recognizing a position of the insulating substrate by the mark and bonding a wire to the semiconductor chip;
joining an electrode to the soldering portion by a solder; and
encapsulating the insulating substrate, the semiconductor chip, the wire, and the electrode in an encapsulation material,
wherein a spacing between the soldering portion and the mark is set to at least 5 mm.
3. A semiconductor device comprising:
an insulating substrate including a wiring pattern;
a soldering portion provided on the wiring pattern;
a mark provided on the wiring pattern and formed of same material as the soldering portion;
a semiconductor chip mounted on the insulating substrate;
a wire bonded to the semiconductor chip;
an electrode joined to the soldering portion by a solder; and
an encapsulation material encapsulating the insulating substrate, the semiconductor chip, the wire, and the electrode.Cited by (0)
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