P
US9280291B2ActiveUtilityPatentIndex 71

Method for data accessing and memory writing for logic analyzer

Assignee: ZEROPLUS TECHNOLOGY CO LTDPriority: Feb 15, 2012Filed: Feb 7, 2013Granted: Mar 8, 2016
Est. expiryFeb 15, 2032(~5.6 yrs left)· nominal 20-yr term from priority
Inventors:CHENG CHIU-HAO
G11C 29/56G01R 31/3177G06F 3/0611G11C 2029/5602G01R 31/318314
71
PatentIndex Score
3
Cited by
13
References
17
Claims

Abstract

A method of fetching digital data and writing the digital data into a memory of a logic analyzer, which comprises the steps: designate at least a first region and a second region in a memory; set a first triggering condition and a second triggering condition; fetch digital data continuously and write it into the memory while analyzing; and then write first test data which have an identification to satisfy the first triggering condition into the first region, and write second test data which have an identification to satisfy the second triggering condition into the second region. And once the first test data or the second test data are found, stop writing the digital data into the corresponding regions.

Claims

exact text as granted — not AI-modified
What is claimed is:  
     
       1. A method of fetching digital data and writing the digital data into one single memory of one single logic analyzer, comprising the steps of:
 A. designating a first region and a second region in the one single memory of the one single analyzer; 
 B. setting a first triggering condition and a second triggering condition; 
 C. fetching digital data and writing the digital data into the memory, wherein the digital data have first test data and second test data; the first test data have an identification, which satisfies the first triggering condition, and the second test data have an identification too, which satisfies the second triggering condition; 
 D. finding the first test data and the second test data in the digital data, and then writing the first test data into the first region, and writing the second test data into the second region, wherein the digital data are restricted from being written into the first region once the first test data are found and written into the first region, and the digital data are restricted from being written into the second region once the second test data are found and written into the second region; and 
 E. recording a first time point which indicates when the first test data are written into the first region, and recording a second time point which indicates when the second test data are written into the second region, wherein the first time point and the second time point are obtained by calculating a sum of products of an occurring cycle of a number of specific data and occurring counts of those specific data. 
 
     
     
       2. The method of  claim 1 , wherein a length of the first test data is equal to or shorter than a length of the first region, and a length of the second test data is equal to or shorter than a length of the second region. 
     
     
       3. The method of  claim 2 , wherein the length of the first region is equal to the length of the second region. 
     
     
       4. The method of  claim 2 , wherein the length of the first region is not equal to the length of the second region. 
     
     
       5. The method of  claim 1 , wherein the first triggering condition is the same as the second triggering condition. 
     
     
       6. The method of  claim 4 , wherein the first triggering condition is different from the second triggering condition. 
     
     
       7. The method of  claim 1 , wherein the first test data are written into the first region under a first sampling frequency; the second test data are written into the second region under a second sampling frequency; the first sampling frequency is equal to the second sampling frequency. 
     
     
       8. The method of  claim 1 , wherein the first test data are written into the first region under a first sampling frequency; the second test data are written into the second region under a second sampling frequency; the first sampling frequency is not equal to the second sampling frequency. 
     
     
       9. The method of  claim 8 , wherein the first sampling frequency is higher than the second sampling frequency. 
     
     
       10. The method of  claim 1 , wherein the first time point and the second time point are obtained by calculating a period of time since the time when the digital data start to be fetched, or since the time when the previous first test data are written into the first region or the previous second test data are written into the second region, to the time when the first test data or the second test data are written into the first region or the second region. 
     
     
       11. The method of  claim 1 , wherein the first time point and the second time point are obtained via a timer. 
     
     
       12. The method of  claim 1 , wherein the digital data are overwritten into the first region in the step C until the first test data are found and written into the first region. 
     
     
       13. The method of  claim 1 , wherein the digital data are overwritten into the second region in the step C until the second test data are found and written into the second region. 
     
     
       14. The method of  claim 1 , further comprising the step of setting a length of the first test data. 
     
     
       15. The method of  claim 1 , further comprising the step of setting a length of the second test data. 
     
     
       16. The method of  claim 1 , wherein the digital data are written into the first region in the beginning of the step C, and the digital data are written into the second region only after the first test data are found and written in the first region. 
     
     
       17. The method of  claim 1 , wherein the digital data are written into both the first region and the second region at the same time in the step C.

Cited by (0)

No later patents cite this yet.

References (0)

No backward citations on record.