P
US9311177B2ActiveUtilityPatentIndex 62

Mechanism to support reliability, availability, and serviceability (RAS) flows in a peer monitor

Assignee: YAO JIEWENPriority: Mar 7, 2013Filed: Mar 7, 2013Granted: Apr 12, 2016
Est. expiryMar 7, 2033(~6.7 yrs left)· nominal 20-yr term from priority
Inventors:YAO JIEWENZIMMER VINCENT
G06F 21/00G11C 29/08G06F 11/0793G06F 11/073G06F 11/00G06F 9/4406G06F 9/468G06F 13/4081G06F 9/542G06F 9/52G06F 9/4812
62
PatentIndex Score
2
Cited by
13
References
20
Claims

Abstract

A mechanism to support reliability, availability, and serviceability (RAS) flows in a peer monitor is disclosed. A method of the disclosure includes receiving, by a processing device, a system management interrupt (SMI) event. The method further includes invoking, in response to the SMI event, a privilege manager to execute from a read-only memory (ROM) entry point to handle the SMI event, the privilege manager comprising a hot plug service module to provide support for memory hot plug functionality and processor hot plug functionality.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
       1. A method for supporting reliability, availability, and serviceability (RAS) flows in a peer monitor, comprising:
 receiving, by a processing device, a system management interrupt (SMI) event; and 
 invoking, by the processing device in response to the SMI event, a privilege manager to execute from a read-only memory (ROM) entry point to handle the SMI event, the privilege manager comprising a hot plug service module to provide support for memory hot plug functionality and processor hot plug functionality, 
 wherein the privilege manager is to execute an error check on read-access memory (RAM) subsequent to invocation. 
 
     
     
       2. The method of  claim 1 , wherein the privilege manager is a system management interrupt (SMI) transfer monitor (STM). 
     
     
       3. The method of  claim 1 , wherein the privilege manager comprises a hypervisor executing system management mode (SMM) code of a basic input/output system (BIOS) as a guest of the privilege manager. 
     
     
       4. The method of  claim 1 , wherein the privilege manager is to access a transition data structure to verify an integrity of the RAM for the error check. 
     
     
       5. The method of  claim 4 , wherein the transition data structure maintains data comprising at least one of a size of the privilege manager in the ROM, a size of the privilege manager in the RAM, a cyclic redundancy check (CRC) value, a check value, a hash, or a cryptographic marker. 
     
     
       6. The method of  claim 1 , wherein when the error check indicates an error in the RAM, the privilege manager is to invoke a BIOS SMM handler to resolve the error in the RAM. 
     
     
       7. The method of  claim 1 , wherein when the error check indicates no error in the RAM, the privilege manager is to pass control to another version of the privilege manager executing in the RAM. 
     
     
       8. The method of  claim 1 , wherein the hot plug service module comprises a set of extensions to Application Programming Interfaces (APIs) to support hot plug functionality for memory, the extensions to the APIs comprising an add BIOS resource VMCALL and a remove BIOS resource VMCALL that are communicated between a basic input/output system (BIOS) and the privilege manager. 
     
     
       9. The method of  claim 1 , wherein the hot plug service module comprises a set of extensions to Application Programming Interfaces (APIs) to support hot plug functionality for processor, the extensions to the APIs comprising an add processor VMCALL and a remove processor VMCALL that are communicated between a basic input/output system (BIOS) and the privilege manager. 
     
     
       10. An apparatus for supporting reliability, availability, and serviceability (RAS) flows in a peer monitor, comprising:
 a memory module comprising a privilege execution environment and a low privilege execution environment; and 
 a processing device communicably coupled to the memory module, the processing device to:
 receive a system management interrupt (SMI) event; 
 invoke, in response to the SMI event, a SMI transfer monitor (STM) to execute from a read-only memory (ROM) entry point to handle the SMI event; and 
 provide, by the STM, support for memory hot plug functionality and processor hot plug functionality via a hot plug service module of the STM, 
 wherein the STM to execute an error check on read-access memory (RAM) subsequent to invocation. 
 
 
     
     
       11. The apparatus of  claim 10 , wherein the STM to execute as a hypervisor and to virtualize system management mode (SMM) code of a basic input/output system (BIOS) of the apparatus as a guest of the STM. 
     
     
       12. The apparatus of  claim 10 , wherein when the error check indicates an error in the RAM, the STM is to invoke a BIOS SMM handler to resolve the error in the RAM. 
     
     
       13. The apparatus of  claim 10 , wherein when the error check indicates no error in the RAM, the STM is to pass control to another version of the privilege manager executing in the RAM. 
     
     
       14. The apparatus of  claim 10 , wherein the hot plug service module comprises a set of extensions to Application Programming Interfaces (APIs) to support the hot plug functionality for the memory, the extensions to the APIs comprising an add BIOS resource VMCALL and a remove BIOS resource VMCALL that are communicated between a basic input/output system (BIOS) and the STM. 
     
     
       15. The apparatus of  claim 10 , wherein the hot plug service module comprises a set of extensions to Application Programming Interfaces (APIs) to support the hot plug functionality for the processor, the extensions to the APIs comprising an add processor VMCALL and a remove processor VMCALL that are communicated between a basic input/output system (BIOS) and the STM. 
     
     
       16. A non-transitory machine-readable storage medium including data that, when accessed by a processing device, cause the processing device to perform operations comprising:
 accessing, by a privilege manager executed by the processing device from a read-only memory (ROM) entry point, a transition data structure tracking an integrity of a read-access memory (RAM), the accessing in response to the processing device receiving a system management interrupt (SMI) event; 
 executing, by the privilege manager based on the transition data structure, an error check on the RAM; and 
 when the error check indicates no error in the RAM, passing, by the privilege manager, control to another version of the privilege manager executing in the RAM to handle the SMI event, the privilege manager comprising a hot plug service module to provide support for memory hot plug functionality and processor hot plug functionality. 
 
     
     
       17. The non-transitory machine-readable storage medium of  claim 16 , wherein the privilege manager is a system management interrupt (SMI) transfer monitor (STM) that executes as a hypervisor, and wherein the STM virtualizes system management mode (SMM) code of a basic input/output system (BIOS) as a guest of the STM. 
     
     
       18. The non-transitory machine-readable storage medium of  claim 16 , the operations further comprise, when the error check indicates an error in the RAM, invoking, by the privilege manager, a BIOS SMM handler to resolve the error in the RAM. 
     
     
       19. The non-transitory machine-readable storage medium of  claim 16 , wherein the hot plug service module comprising a set of extensions to Application Programming Interfaces (APIs) to support hot plug functionality for memory, the extensions to the APIs comprising an add BIOS resource VMCALL and a remove BIOS resource VMCALL that are communicated between a basic input/output system (BIOS) and the privilege manager. 
     
     
       20. The non-transitory machine-readable storage medium of  claim 16 , wherein the hot plug service module comprising a set of extensions to Application Programming Interfaces (APIs) to support hot plug functionality for processor, the extensions to the APIs comprising an add processor VMCALL and a remove processor VMCALL that are communicated between a basic input/output system (BIOS) and the privilege manager.

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