US9406699B2ExpiredUtilityPatentIndex 98
Semiconductor device, and display device and electronic device having the same

Assignee: SEMICONDUCTOR ENERGY LABPriority: Jan 7, 2006Filed: Dec 30, 2013Granted: Aug 2, 2016
Est. expiryJan 7, 2026(expired)· nominal 20-yr term from priority
H03K 3/356104H03K 19/00369G09G 3/3266G09G 2310/08G09G 2300/0408G09G 2310/0286G02F 1/13624G09G 3/325G09G 2300/0809G09G 2310/0297G09G 3/3674G09G 2330/021G09G 2310/0289G09G 3/3696G11C 19/28G09G 3/20G09G 3/3677H03K 3/356G09G 3/3258H10D 86/40H10D 86/441H10D 86/60H01L 27/1214H03K 19/20G11C 19/287G09G 3/36H03K 19/003
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References
Claims
Abstract

An object is to provide a semiconductor device which can suppress characteristic deterioration in each transistor without destabilizing operation. In a non-selection period, a transistor is turned on at regular intervals, so that a power supply potential is supplied to an output terminal of a shift register circuit. A power supply potential is supplied to the output terminal of the shift register circuit through the transistor. Since the transistor is not always on in a non-selection period, a shift of the threshold voltage of the transistor is suppressed. In addition, a power supply potential is supplied to the output terminal of the shift register circuit through the transistor at regular intervals. Therefore, the shift register circuit can suppress noise which is generated in the output terminal.
Claims

exact text as granted — not AI-modified
What is claimed is: 
     
       1. A semiconductor device comprising:
 a first transistor; 
 a second transistor; 
 a first element; 
 a first switch; 
 a first wiring; and 
 a second wiring, 
 wherein one of a source and a drain of the first transistor is configured to be supplied with a first potential, 
 wherein the other of the source and the drain of the first transistor is configured to be supplied with a first signal, 
 wherein one of a source and a drain of the second transistor is electrically connected to the first wiring configured to be supplied with a second signal, 
 wherein the other of the source and the drain of the second transistor is electrically connected to a gate of the first transistor, 
 wherein a first terminal of the first element is electrically connected to the second wiring configured to be supplied with a third signal, 
 wherein a second terminal of the first element is electrically connected to a gate of the second transistor, 
 wherein a first terminal of the first switch is configured to be supplied with the first potential, and 
 wherein a second terminal of the first switch is electrically connected to the gate of the second transistor. 
 
     
     
       2. The semiconductor device according to  claim 1 , further comprising a third transistor,
 wherein one of a source and a drain of the third transistor is configured to be supplied a fourth potential, and 
 wherein the other of the source and the drain of the third transistor is electrically connected to the other of the source and the drain of the first transistor. 
 
     
     
       3. The semiconductor device according to  claim 2 , further comprising a fifth transistor,
 wherein one of a source and a drain of the fifth transistor is configured to be supplied with the first potential, 
 wherein the other of the source and the drain of the fifth transistor is electrically connected to the gate of the third transistor, and 
 wherein a gate of the fifth transistor is electrically connected to the gate of the first transistor. 
 
     
     
       4. The semiconductor device according to  claim 1 , further comprising:
 a third transistor; and 
 a fourth transistor, 
 wherein one of a source and a drain of the third transistor is configured to be supplied with a second potential, 
 wherein the other of the source and the drain of the third transistor is electrically connected to the other of the source and the drain of the first transistor, 
 wherein one of a source and a drain of the fourth transistor is configured to be supplied with the second potential, 
 wherein the other of the source and the drain of the third transistor is electrically connected to a gate of the third transistor, and 
 wherein a gate of the fourth transistor is configured to be supplied with a fourth signal. 
 
     
     
       5. The semiconductor device according to  claim 4 , further comprising a fifth transistor,
 wherein one of a source and a drain of the fifth transistor is configured to be supplied with the first potential, 
 wherein the other of the source and the drain of the fifth transistor is electrically connected to the gate of the third transistor, and 
 wherein a gate of the fifth transistor is electrically connected to the gate of the first transistor. 
 
     
     
       6. The semiconductor device according to  claim 1 , further comprising:
 a third transistor; and 
 a fourth transistor, 
 wherein one of a source and a drain of the third transistor is configured to be supplied with a fourth signal, 
 wherein the other of the source and the drain of the third transistor is electrically connected to the other of the source and the drain of the first transistor, 
 wherein one of a source and a drain of the fourth transistor is configured to be supplied with a second potential, 
 wherein the other of the source and the drain of the fourth transistor is electrically connected to a gate of the third transistor, and 
 wherein a gate of the fourth transistor is configured to be supplied with a fifth signal. 
 
     
     
       7. The semiconductor device according to  claim 6 , further comprising a fifth transistor,
 wherein one of a source and a drain of the fifth transistor is configured to be supplied with the first potential, 
 wherein the other of the source and the drain of the fifth transistor is electrically connected to the gate of the third transistor, and 
 wherein a gate of the fifth transistor is electrically connected to the gate of the first transistor. 
 
     
     
       8. The semiconductor device according to  claim 1 ,
 wherein the first element is configured to generate a voltage when a current flows in the first element, 
 wherein the first transistor is configured to be turned on when a third potential of the second signal is applied to the gate of the first transistor, 
 wherein the first transistor is configured to be turned off when a fourth potential of the second signal is applied to the gate of the first transistor. 
 
     
     
       9. The semiconductor device according to  claim 1 , wherein the first element is a transistor. 
     
     
       10. A display device comprising:
 the semiconductor device according to  claim 1 ; and 
 a pixel, 
 wherein the pixel comprises a display element, and 
 wherein the pixel is electrically connected to other of the source and the drain of the first transistor. 
 
     
     
       11. A display device comprising:
 the semiconductor device according to  claim 1 ; and 
 a pixel, 
 wherein the pixel comprises a light-emitting element, and 
 wherein the pixel is electrically connected to other of the source and the drain of the first transistor. 
 
     
     
       12. A display device comprising:
 the semiconductor device according to  claim 1 ; and 
 a pixel, 
 wherein the pixel comprises a liquid crystal element, and 
 wherein the pixel is electrically connected to other of the source and the drain of the first transistor. 
 
     
     
       13. A display module comprising:
 the semiconductor device according to  claim 1 ; and 
 a flexible printed circuit. 
 
     
     
       14. An electronic appliance comprising:
 the display module according to  claim 13 ; 
 an operation switch; and 
 a battery or a speaker. 
 
     
     
       15. A semiconductor device comprising:
 a first transistor; 
 a second transistor; 
 a first element; 
 a first switch; 
 a first wiring; 
 a second wiring; 
 a third wiring; and 
 a fourth wiring, 
 wherein one of a source and a drain of the first transistor is electrically connected to the first wiring, 
 wherein the other of the source and the drain of the first transistor is electrically connected to the second wiring, 
 wherein one of a source and a drain of the second transistor is electrically connected to the third wiring, 
 wherein the other of the source and the drain of the second transistor is electrically connected to a gate of the first transistor, 
 wherein a first terminal of the first element is electrically connected to the fourth wiring, 
 wherein a second terminal of the first element is electrically connected to a gate of the second transistor, 
 wherein a first terminal of the first switch is electrically connected to the first wiring, 
 wherein a second terminal of the first switch is electrically connected to the gate of the second transistor, 
 wherein the first wiring is configured to be supplied with a first potential, 
 wherein the second wiring is configured to be supplied with a first signal, 
 wherein the third wiring is configured to be supplied with a second signal, and 
 wherein the fourth wiring is configured to be supplied with a third signal that is different from the second signal. 
 
     
     
       16. The semiconductor device according to  claim 15 , further comprising:
 a third transistor; and 
 a fifth wiring, 
 wherein one of a source and a drain of the third transistor is electrically connected to the fifth wiring, 
 wherein the other of the source and the drain of the third transistor is electrically connected to the second wiring and 
 wherein the fifth wiring is configured to be supplied with a second potential or a fourth signal. 
 
     
     
       17. The semiconductor device according to  claim 16 , further comprising a fifth transistor,
 wherein one of a source and a drain of the fifth transistor is electrically connected to the first wiring, 
 wherein the other of the source and the drain of the fifth transistor is electrically connected to the gate of the third transistor, and 
 wherein a gate of the fifth transistor is electrically connected to the gate of the first transistor. 
 
     
     
       18. The semiconductor device according to  claim 15 , further comprising:
 a third transistor; 
 a fourth transistor; 
 a fifth wiring; 
 a sixth wiring; and 
 a seventh wiring, 
 wherein one of a source and a drain of the third transistor is electrically connected to the fifth wiring, 
 wherein the other of the source and the drain of the third transistor is electrically connected to the second wiring, 
 wherein one of a source and a drain of the fourth transistor is electrically connected to the sixth wiring, 
 wherein the other of the source and the drain of the fourth transistor is electrically connected to a gate of the third transistor, 
 wherein a gate of the fourth transistor is electrically connected to the seventh wiring, 
 wherein the fifth wiring is configured to be supplied with a fourth signal, 
 wherein the sixth wiring is configured to be supplied with the second signal, and 
 wherein the seventh wiring is configured to be supplied with a fifth signal. 
 
     
     
       19. The semiconductor device according to  claim 18 , further comprising a fifth transistor,
 wherein one of a source and a drain of the fifth transistor is electrically connected to the first wiring, 
 wherein the other of the source and the drain of the fifth transistor is electrically connected to the gate of the third transistor, and 
 wherein a gate of the fifth transistor is electrically connected to the gate of the first transistor. 
 
     
     
       20. The semiconductor device according to  claim 15 ,
 wherein the first element is configured to generate a voltage when a current flows in the first element, 
 wherein the first transistor is configured to be turned on when a third potential of the second signal is applied to the gate of the first transistor, 
 wherein the first transistor is configured to be turned off when a fourth potential of the second signal is applied to the gate of the first transistor. 
 
     
     
       21. The semiconductor device according to  claim 15 , wherein the first element is a transistor. 
     
     
       22. A display device comprising:
 the semiconductor device according to  claim 15 ; and 
 a pixel, 
 wherein the pixel comprises a display element, and 
 wherein the pixel is electrically connected to other of the source and the drain of the first transistor. 
 
     
     
       23. A display device comprising:
 the semiconductor device according to  claim 15 ; and 
 a pixel, 
 wherein the pixel comprises a light-emitting element, and 
 wherein the pixel is electrically connected to other of the source and the drain of the first transistor. 
 
     
     
       24. A display device comprising:
 the semiconductor device according to  claim 15 ; and 
 a pixel, 
 wherein the pixel comprises a liquid crystal element, and 
 wherein the pixel is electrically connected to other of the source and the drain of the first transistor. 
 
     
     
       25. A display module comprising:
 the semiconductor device according to  claim 15 ; and 
 a flexible printed circuit. 
 
     
     
       26. An electronic appliance comprising:
 the display module according to  claim 25 ; 
 an operation switch; and 
 a battery or a speaker. 
 
     
     
       27. A semiconductor device comprising:
 a first transistor; 
 a second transistor; 
 a third transistor; 
 a fourth transistor; and 
 a switch; 
 a first wiring; 
 a second wiring; 
 a third wiring; and 
 a fourth wiring, 
 wherein one of a source and a drain of the first transistor is electrically connected to the first wiring, 
 wherein the other of the source and the drain of the first transistor is electrically connected to the second wiring, 
 wherein one of a source and a drain of the second transistor is electrically connected to the third wiring, 
 wherein the other of the source and the drain of the second transistor is electrically connected to a gate of the first transistor, 
 wherein one of a source and a drain of the third transistor is electrically connected to the fourth wiring, 
 wherein the other of the source and the drain of the third transistor is electrically connected to a gate of the second transistor, 
 wherein one of a source and a drain of the fourth transistor is electrically connected to the fourth wiring, 
 wherein the other of the source and the drain of the fourth transistor is electrically connected to the second wiring, 
 wherein a first terminal of the switch is electrically connected to the first wiring, 
 wherein a second terminal of the switch is electrically connected to the gate of the second transistor, 
 wherein the third wiring and the fourth wiring are configured to be supplied with different signals from each other. 
 
     
     
       28. The semiconductor device according to  claim 27 , wherein the third wiring is configured to be supplied with a signal. 
     
     
       29. The semiconductor device according to  claim 27 ,
 wherein the third wiring is configured to be supplied with a signal, 
 wherein the first transistor is configured to be turned on when a first potential of the signal is applied to the gate of the first transistor, 
 wherein the first transistor is configured to be turned off when a second potential of the signal is applied to the gate of the first transistor. 
 
     
     
       30. The semiconductor device according to  claim 27 , further comprising a capacitor,
 wherein a first terminal of the capacitor is electrically connected to a gate of the fourth transistor, and 
 wherein a second terminal of the capacitor is electrically connected to the other of the source and the drain of the fourth transistor. 
 
     
     
       31. The semiconductor device according to  claim 27 ,
 wherein a gate of the third transistor is electrically connected to the one of the source and the drain of the third transistor. 
 
     
     
       32. The semiconductor device according to  claim 27 , further comprising:
 a fifth transistor; and 
 a fifth wiring, 
 wherein one of a source and a drain of the fifth transistor is electrically connected to the fifth wiring, and 
 wherein the other of the source and the drain of the fifth transistor is electrically connected to a gate of the fourth transistor. 
 
     
     
       33. A display device comprising:
 the semiconductor device according to  claim 27 ; and 
 a pixel, 
 wherein the pixel comprises a display element, and 
 wherein the pixel is electrically connected to other of the source and the drain of the first transistor. 
 
     
     
       34. A display device comprising:
 the semiconductor device according to  claim 27 ; and 
 a pixel, 
 wherein the pixel comprises a light-emitting element, and 
 wherein the pixel is electrically connected to other of the source and the drain of the first transistor. 
 
     
     
       35. A display device comprising:
 the semiconductor device according to  claim 27 ; and 
 a pixel, 
 wherein the pixel comprises a liquid crystal element, and 
 wherein the pixel is electrically connected to other of the source and the drain of the first transistor. 
 
     
     
       36. A display module comprising:
 the semiconductor device according to  claim 27 ; and 
 a flexible printed circuit. 
 
     
     
       37. An electronic appliance comprising:
 the display module according to  claim 36 ; 
 an operation switch; and 
 a battery or a speaker.
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