P
US9560752B2ActiveUtilityPatentIndex 73

Printed circuit board having improved characteristic impedance

Assignee: HON HAI PREC IND CO LTDPriority: Apr 26, 2013Filed: Apr 25, 2014Granted: Jan 31, 2017
Est. expiryApr 26, 2033(~6.8 yrs left)· nominal 20-yr term from priority
Inventors:WU JERRYCHEN JUNMENG FAN-BO
H05K 1/025H05K 1/111H05K 1/0245H05K 3/341H05K 2201/10356H05K 1/117H01R 24/62H05K 2201/09736H05K 1/0298H05K 1/0242H01R 13/6658
73
PatentIndex Score
3
Cited by
4
References
13
Claims

Abstract

An printed circuit board ( 14 ) includes a first insulative layer ( 140 ), a first conductive path ( 141 ), a second conductive path ( 142 ) and an insulative substrate ( 143 ) stacked together. The first conductive path is disposed between the insulative substrate and the first insulative layer. The first conductive path includes an engaging portion ( 146 ), a middle portion ( 148 ) having an end connected with the engaging portion, and a soldering portion ( 147 ) connected with an opposite end of the middle portion. The second conductive path is aligned with the middle portion of the first conductive path along a vertical direction, the second conductive path electrically connected with the middle portion of the first conductive path to increase a thickness thereon.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
       1. A printed circuit board comprising: a first insulative layer, a first conductive path, a second conductive path, and an insulative substrate stacked together, the first conductive path being disposed between the insulative substrate and the first insulative layer, the first conductive path comprising an engaging portion, a middle portion having an end connected with the engaging portion, and a soldering portion connected with an opposite end of the middle portion, the second conductive path aligned with the middle portion of the first conductive path along a vertical direction, the second conductive path being electrically connected with the middle portion of the first conductive path to define a combined thickness. 
     
     
       2. The printed circuit board as claimed in  claim 1 , wherein a thickness of the middle portion is greater than a thickness of the engaging portion, and the thickness of the middle portion is greater than a thickness of the soldering portion. 
     
     
       3. The printed circuit board as claimed in  claim 2 , wherein the second conductive path is disposed between the first conductive path and the insulative substrate. 
     
     
       4. The printed circuit board as claimed in  claim 2 , wherein the second conductive path is disposed between the first conductive path and the first insulative layer. 
     
     
       5. The printed circuit board as claimed in  claim 1 , wherein the first conductive path is electrically connected with the second conductive path by conductive glue. 
     
     
       6. The printed circuit board as claimed in  claim 1 , wherein the first conductive path is electrically connected with the second conductive path by laser welding. 
     
     
       7. The printed circuit board as claimed in  claim 1 , wherein the first insulative layer defines a slot to expose the soldering portion, the slot aligned with the soldering portion along the vertical direction. 
     
     
       8. The printed circuit board as claimed in  claim 1 , further comprising a second insulative layer and a third conductive path, the third conductive path disposed between the second insulative layer and the insulative substrate. 
     
     
       9. An electrical connector comprising:
 a printed circuit board including an insulative substrate; 
 a first conductive layer applied upon the insulative substrate in a vertical direction, and including a plurality of first circuit paths thereof along a front-to-back direction perpendicular to said vertical direction, each of said circuit paths defining a front engaging portion for connecting with a conductive terminal, a rear soldering portion for soldering to a conductive wire, and a middle portion between the front engaging portion and a rear soldering portion in the front-to-back direction; and 
 a second conductive layer formed between the first conductive layer and the insulative substrate in the vertical direction and including a plurality of second circuit paths electrically connected to the middle portions of the corresponding first circuit paths, respectively, for lowering characteristic impedance thereabouts. 
 
     
     
       10. The electrical connector as claimed in  claim 9 , wherein the second circuit paths are aligned and intimately contacted with the middle portions of the corresponding first circuit paths in the vertical direction. 
     
     
       11. The electrical connector as claimed in  claim 9 , further including an insulative layer applied upon the first conductive layer while exposing the engaging portions and the soldering portions of the first circuit paths. 
     
     
       12. The electrical connector as claimed in  claim 9 , further including a third conductive layer applied upon the other side of the insulative substrate. 
     
     
       13. A printed circuit board comprising: an insulative substrate defining opposite surfaces in a vertical direction; a conductive layer applied upon one of said surfaces and including a plurality of circuit paths, each of said circuit path defining, along a front-to-back direction perpendicular to said front-to-back direction, a front engaging portion connecting with a conductive terminal, a rear soldering portion for soldering to a conductive wire, and a middle portion between the front engaging portion and the rear soldering portion in the front-to-back direction; wherein a thickness of the middle portion is larger than those of both the front engaging portion and said rear soldering portion in the vertical direction for lowering impedance thereabouts, wherein a larger thickness of the middle portion compared with those of the front engaging portion and the rear soldering portion is derived from an additional conductive layer including a plurality of another circuit paths intimately contacting the corresponding circuit paths in the vertical direction, respectively.

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