US9583646B2ActiveUtilityA1

Bottom-emitting substrate, display device and manufacturing method of substrate

67
Assignee: BOE TECHNOLOGY GROUP CO LTDPriority: Oct 28, 2013Filed: Jun 5, 2014Granted: Feb 28, 2017
Est. expiryOct 28, 2033(~7.3 yrs left)· nominal 20-yr term from priority
H10K 59/131H10K 59/8792H10F 77/334H10K 59/1213H01L 27/3262H01L 51/5284H01L 27/3276H01L 31/02164H10K 50/865
67
PatentIndex Score
1
Cited by
16
References
18
Claims

Abstract

A bottom-emitting substrate, a display device and a method for manufacturing the bottom emitting substrate are provided. The bottom-emitting substrate comprises: a base substrate ( 1 ); a black matrix layer ( 2 ) with a plurality of opening regions and a plurality of non-opening regions disposed on the base substrate ( 1 ); and an array substrate unit disposed on the black matrix layer ( 2 ), projections of metal layers in the array substrate unit on the black matrix layer ( 2 ) locating within the plurality of non-opening regions of the black matrix layer ( 2 ). A method for manufacturing the bottom-emitting substrate and a display device comprising the bottom-emitting substrate are also provided.

Claims

exact text as granted — not AI-modified
The invention claimed is: 
     
       1. A method for manufacturing a bottom-emitting substrate, comprising:
 forming a black matrix layer with a plurality of opening regions and a plurality of non-opening regions on a base substrate; and 
 forming an array substrate unit on the black matrix layer, projections of metal layers in the array substrate unit on the black matrix layer locating within a plurality of non-opening regions of the black matrix layer. 
 
     
     
       2. The method according to  claim 1 , further comprising:
 forming a color filter on the array substrate unit; and 
 forming a transparent electrode layer on the color filter. 
 
     
     
       3. The method according to  claim 1 , wherein forming an array substrate unit on the black matrix layer comprises:
 forming patterned gate lines and a patterned gate layer on the black matrix layer, projections of the gate lines and the gate layer on the black matrix layer locating within the plurality of non-opening regions of the black matrix layer; 
 forming a gate insulating layer covering the gate layer; 
 forming a patterned active layer on the gate insulating layer, a projection of the active layer on the black matrix layer locating within the plurality of non-opening regions of the black matrix layer; 
 forming patterned data lines and a patterned source/drain layer on the active layer, projections of the data lines and the source/drain layer on the black matrix layer locating within the plurality of non-opening regions of the black matrix layer; and 
 forming a passivation layer on the source/drain layer. 
 
     
     
       4. The method according to  claim 3 , further comprising:
 forming a color filter on the array substrate unit; and 
 forming a transparent electrode layer on the color filter. 
 
     
     
       5. The method of  claim 1 , wherein forming a black matrix layer with a plurality of opening regions and a plurality of non-opening regions on the base substrate comprises:
 forming a black photoresist layer on the base substrate; and 
 forming a black matrix layer with a plurality of opening regions and a plurality of non-opening regions through an etching process utilizing a mask. 
 
     
     
       6. The method according to  claim 5 , wherein forming an array substrate unit on the black matrix layer comprises:
 forming patterned gate lines and a patterned gate layer on the black matrix layer, projections of the gate lines and the gate layer on the black matrix layer locating within the plurality of non-opening regions of the black matrix layer; 
 forming a gate insulating layer covering the gate layer; 
 forming a patterned active layer on the gate insulating layer, a projection of the active layer on the black matrix layer locating within the plurality of non-opening regions of the black matrix layer; 
 forming patterned data lines and a patterned source/drain layer on the active layer, projections of the data lines and the source/drain layer on the black matrix layer locating within the plurality of non-opening regions of the black matrix layer; and 
 forming a passivation layer on the source/drain layer. 
 
     
     
       7. The method according to  claim 5 , further comprising:
 forming a color filter on the array substrate unit; and 
 forming a transparent electrode layer on the color filter. 
 
     
     
       8. A bottom-emitting substrate comprising:
 a base substrate; 
 a black matrix layer with a plurality of opening regions and a plurality of non-opening regions disposed on the base substrate; and 
 an array substrate unit disposed on the black matrix layer, projections of metal layers in the array substrate unit on the black matrix layer locating within the plurality of non-opening regions of the black matrix layer. 
 
     
     
       9. A display device comprising the bottom-emitting substrate according to  claim 8 . 
     
     
       10. The bottom-emitting substrate according to  claim 8 , further comprising: a color filter disposed on the array substrate unit and a transparent electrode layer disposed on the color filter. 
     
     
       11. A display device comprising the bottom-emitting substrate according to  claim 10 . 
     
     
       12. The bottom-emitting substrate according to  claim 8 , wherein the array substrate may further comprises:
 gate lines and a gate layer disposed on the black matrix layer, projections of the gate lines and the gate layer on the black matrix layer locating within the plurality of non-opening regions of the black matrix layer; 
 a gate insulating layer covering the gate layer; 
 an active layer disposed on the gate insulating layer, projections of the active layer on the black matrix layer locating within the plurality of non-opening regions of the black matrix layer; 
 data lines and a source/drain layer disposed on the active layer, projections of the data lines and the source/drain layer on the black matrix layer locating within the plurality of non-opening regions of the black matrix layer; and 
 a passivation layer covering the source/drain layer. 
 
     
     
       13. The bottom-emitting substrate according to  claim 12 , further comprising: a color filter disposed on the array substrate unit and a transparent electrode layer disposed on the color filter. 
     
     
       14. A display device comprising the bottom-emitting substrate according to  claim 12 . 
     
     
       15. The bottom-emitting substrate according to  claim 8 , wherein in the black matrix layer, the plurality of non-opening regions are arranged in an array and the plurality of opening areas are arranged between the plurality of non-opening areas alternatively. 
     
     
       16. The bottom-emitting substrate according to  claim 15 , wherein the array substrate may further comprises:
 gate lines and a gate layer disposed on the black matrix layer, projections of the gate lines and the gate layer on the black matrix layer locating within the plurality of non-opening regions of the black matrix layer; 
 a gate insulating layer covering the gate layer; 
 an active layer disposed on the gate insulating layer, projections of the active layer on the black matrix layer locating within the plurality of non-opening regionis of the black matrix layer; 
 data lines and a source/drain layer disposed on the active layer, projections of the data lines and the source/drain layer on the black matrix layer locating within the plurality of non-opening regions of the black matrix layer; and 
 a passivation layer covering the source/drain layer. 
 
     
     
       17. The bottom-emitting substrate according to  claim 15 , further comprising: a color filter disposed on the array substrate unit and a transparent electrode layer disposed on the color filter. 
     
     
       18. A display device comprising the bottom-emitting substrate according to  claim 15 .

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