US9626169B2ActiveUtilityA1

Controlling execution of binary code

71
Assignee: IBMPriority: Mar 18, 2014Filed: Jun 23, 2015Granted: Apr 18, 2017
Est. expiryMar 18, 2034(~7.7 yrs left)· nominal 20-yr term from priority
G06F 21/52G06F 11/0703G06F 21/568G06F 9/52G06F 21/00G06F 8/52G06F 9/3861G06F 8/443
71
PatentIndex Score
1
Cited by
9
References
4
Claims

Abstract

An apparatus for controlling an execution of a binary code by multiple threads includes a detection unit configured to detect an occurrence of modification of a first part that is a part of a first binary code by a self-modifying code; a specifying unit configured to specify a second part that is a part corresponding to the first part in a second binary code acquired by converting the first binary code, in response to detection of the occurrence of modification of the first part by the self-modifying code; and a correction unit configured to correct the second part such that a specific thread that executes the second part of the second binary code among the multiple threads causes an exception.

Claims

exact text as granted — not AI-modified
The invention claimed is: 
     
       1. A method of controlling an execution of a binary code by multiple threads, the method comprising:
 detecting an occurrence of modification of a first part that is a part of a first binary code by a self-modifying code; 
 specifying a second part that is a part corresponding to the first part in a second binary code acquired by converting the first binary code, in response to detection of the occurrence of modification of the first part by the self-modifying code; 
 correcting the second part such that a specific thread that executes the second part of the second binary code among the multiple threads causes an exception; and 
 maintaining a state where a page which is a memory area to store at least part of the first part and include an instruction modified by the self-modifying code is mapped to a virtual page to which page protection is not applied and which is not used, while specifying the second part and correcting the second part. 
 
     
     
       2. The method of  claim 1 , wherein the second part is corrected by replacing at least one instruction corresponding to an instruction included in the first part and modified by the self-modifying code among multiple instructions included in the second part, with an interrupt instruction. 
     
     
       3. The method of  claim 1 , further comprising executing, by the specific thread, the first part of the first binary code modified by the self-modifying code when the exception occurs. 
     
     
       4. The method of  claim 3 , wherein the specific thread executes the first part of the first binary code after a link from other parts than the second part of the second binary code to the second part is separated.

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