Integrated circuit device

Abstract

An integrated circuit device including a semiconductor substrate, a first bonding pad structure, a second bonding pad structure, and an internal bonding wire is provided. The first bonding pad structure is disposed on a surface of the semiconductor substrate and exposed outside of the semiconductor substrate. The second bonding pad structure is disposed on the surface of the semiconductor substrate and exposed outside of the semiconductor substrate. The first bonding pad structure is electrically coupled to the second bonding pad structure via the internal bonding wire. The integrated circuit device having a better electrical performance is provided by eliminating internal resistance drop in power supply trails or ground trails, and improving signal integrity of the integrated circuit device.

What is claimed is: 
     
       1. An integrated circuit device, comprising:
 a semiconductor substrate; 
 a first bonding pad structure, disposed on a surface of the semiconductor substrate and exposed outside of the semiconductor substrate; 
 a second bonding pad structure, disposed on the surface of the semiconductor substrate and exposed outside of the semiconductor substrate; and 
 an internal bonding wire, wherein the first bonding pad structure is electrically coupled to the second bonding pad structure via the internal bonding wire. 
 
     
     
       2. The integrated circuit device as claimed in  claim 1 , further comprising:
 an external bonding wire, wherein the second bonding pad structure is electrically coupled to a package lead via the external bonding wire. 
 
     
     
       3. The integrated circuit device as claimed in  claim 2 , wherein the second bonding pad structure comprises a single bonding pad, and the single bonding pad comprises:
 a first bonding area, configured to establish the internal bonding wire between the second bonding pad structure and the first bonding pad structure; and 
 a second bonding area, electrically coupled to the first bonding area, and configured to establish the external bonding wire between the second bonding pad structure and the package lead. 
 
     
     
       4. The integrated circuit device as claimed in  claim 3 , wherein the first bonding area and the second bonding area are located in a same pad opening of the second bonding pad structure. 
     
     
       5. The integrated circuit device as claimed in  claim 3 , wherein the first bonding area and the second bonding area are respectively located in different pad openings of the second bonding pad structure. 
     
     
       6. The integrated circuit device as claimed in  claim 2 , wherein the semiconductor substrate comprises an I/O region and a core circuit region, and the second bonding pad structure comprises:
 a conducting line; 
 a first bonding pad, configured to establish the internal bonding wire between the second bonding pad structure and the first bonding pad structure; and 
 a second bonding pad, electrically coupled to the first bonding pad via the conducting line, and configured to establish the external bonding wire between the second bonding pad structure and the package lead. 
 
     
     
       7. The integrated circuit device as claimed in  claim 6 , wherein the first bonding pad and the second bonding pad are adjacent to each other. 
     
     
       8. The integrated circuit device as claimed in  claim 6 , wherein the second bonding pad structure further comprises at least one third bonding pad located between the first bonding pad and the second bonding pad. 
     
     
       9. The integrated circuit device as claimed in  claim 6 , wherein the first bonding pad is located in one of the I/O region and the core circuit region, and the second bonding pad is located in another one of the I/O region and the core circuit region. 
     
     
       10. The integrated circuit device as claimed in  claim 6 , wherein both of the first bonding pad and the second bonding pad are located in one of the I/O region and the core circuit region. 
     
     
       11. The integrated circuit device as claimed in  claim 1 , wherein the semiconductor substrate comprises an I/O region and a core circuit region, the first bonding pad structure is located in one of the I/O region and the core circuit region, and the second bonding pad structure is located in another one of the I/O region and the core circuit region. 
     
     
       12. The integrated circuit device as claimed in  claim 1 , further comprising a circuit electrically coupled to the first bonding pad structure. 
     
     
       13. The integrated circuit device as claimed in  claim 12 , wherein a power voltage applied to the circuit is transmitted from the second bonding pad structure to the circuit via the internal bonding wire and the first bonding pad structure. 
     
     
       14. The integrated circuit device as claimed in  claim 13 , wherein the power voltage is selected from one of a ground voltage, a first power voltage, and a second power voltage, and the first power voltage having a voltage level greater than the ground voltage, and the second power voltage having a voltage level less than the ground voltage. 
     
     
       15. The integrated circuit device as claimed in  claim 12 , wherein a signal coupled to the circuit is transmitted between the circuit and the second bonding pad structure via the internal bonding wire and the first bonding pad structure. 
     
     
       16. The integrated circuit device as claimed in  claim 1 , further comprising:
 an electrostatic discharge protection circuit electrically coupled to the second bonding pad structure.