Techniques for fabricating horizontally aligned nanochannels for microfluidics and biosensors

Abstract

Techniques for fabricating horizontally aligned nanochannels are provided. In one aspect, a method of forming a device having nanochannels is provided. The method includes: providing a SOI wafer having a SOI layer on a buried insulator; forming at least one nanowire and pads in the SOI layer, wherein the nanowire is attached at opposite ends thereof to the pads, and wherein the nanowire is suspended over the buried insulator; forming a mask over the pads, the mask having a gap therein where the nanowire is exposed between the pads; forming an alternating series of metal layers and insulator layers alongside one another within the gap and surrounding the nanowire; and removing the nanowire to form at least one of the nanochannels in the alternating series of the metal layers and insulator layers. A device having nanochannels is also provided.

What is claimed is: 
     
       1. A method of forming a device having nanochannels, the method comprising:
 providing a silicon-on-insulator (SOI) wafer having a SOI layer on a buried insulator; 
 forming at least one nanowire and pads in the SOI layer, wherein the nanowire is attached at opposite ends thereof to the pads, and wherein the nanowire is suspended over the buried insulator; 
 forming a mask over the pads, the mask having a gap therein where the nanowire is exposed between the pads; 
 forming an alternating series of metal layers and insulator layers alongside one another within the gap and surrounding the nanowire; and 
 removing the nanowire to form at least one of the nanochannels in the alternating series of the metal layers and insulator layers. 
 
     
     
       2. The method of  claim 1 , further comprising:
 undercutting the buried insulator beneath the nanowire to suspend the nanowire over the buried insulator. 
 
     
     
       3. The method of  claim 1 , further comprising:
 reshaping the nanowire to give the nanowire a circular cross-sectional shape. 
 
     
     
       4. The method of  claim 1 , further comprising:
 thinning the nanowire. 
 
     
     
       5. The method of  claim 1 , wherein multiple nanowires are formed in the SOI layer, and wherein the nanowires are attached to the pads in a ladder-like configuration. 
     
     
       6. The method of  claim 5 , wherein the nanowires are spaced apart from each other horizontally by a regular distance a of from about 1 nanometer to about 5 nanometers. 
     
     
       7. The method of  claim 1 , further comprising:
 forming spacers in the gap, wherein the spacers narrow the gap; 
 depositing a metal into the gap between the spacers to form a first metal layer in the series over a central portion of the nanowire; and 
 removing the spacers. 
 
     
     
       8. The method of  claim 7 , further comprising:
 depositing an insulator on a top and sidewalls of the mask and on a top and sidewalls of the first metal layer within the gap to form at least one first insulator layer in the series. 
 
     
     
       9. The method of  claim 8 , further comprising:
 removing the insulator from horizontal surfaces using an anisotropic etch. 
 
     
     
       10. The method of  claim 8 , further comprising:
 thinning the insulator using an isotropic etch. 
 
     
     
       11. The method of  claim 8 , further comprising:
 depositing the metal on a top and sidewalls of the first insulator layer to form at least one second metal layer in the series. 
 
     
     
       12. The method of  claim 11 , further comprising:
 removing the metal from horizontal surfaces using an anisotropic etch. 
 
     
     
       13. The method of  claim 11 , further comprising:
 thinning the metal using an isotropic etch. 
 
     
     
       14. The method of  claim 11 , further comprising:
 adding at least one additional metal layer and at least one additional insulator layer to the series. 
 
     
     
       15. The method of  claim 1 , further comprising:
 depositing a metal on a top and sidewalls of the mask within the gap to form at least one first metal layer in the series; and 
 depositing an insulator on a top and sidewalls of the first metal layer to form at least one first insulator layer in the series. 
 
     
     
       16. The method of  claim 15 , further comprising:
 removing the metal and the insulator from horizontal surfaces. 
 
     
     
       17. A device comprising:
 an alternating series of metal layers and insulator layers alongside one another on a buried insulator; and 
 a plurality of nanochannels that are horizontally aligned through the series of metal layers and insulator layers. 
 
     
     
       18. The device of  claim 17 , wherein the nanochannels are spaced apart from each other horizontally by a regular distance a of from about 1 nm to about 5 nm. 
     
     
       19. The device of  claim 17 , wherein the nanochannels have a circular cross-sectional shape. 
     
     
       20. The device of  claim 17 , wherein the metal is selected from the group consisting of: titanium nitride, tantalum nitride, and tungsten, and wherein the insulator is selected from the group consisting of: silicon oxide, hafnium oxide, silicon nitride, and aluminum oxide.