Pixel circuit with fast read out

Abstract

An image sensor includes a first photodiode with associated first sense node and a second photodiode with associated second sense node. A first transistor has its control node coupled to the first sense node and a second transistor has its control node coupled to the second sense node. The conduction paths (for example, source-drain paths) of the first and second transistors are coupled in series between first and second column lines associated with a column of the image sensor array. Switches control connection of the first and second column lines in two modes: one mode where a voltage is applied to the first column line and data from one of the photodiodes is read out by the second column line; and another mode where a voltage is applied to the second column line and data from the other of the photodiodes is read out by the first column line.

What is claimed is: 
     
       1. A circuit of an image sensor, comprising:
 a first transistor having its control node coupled to a first sense node, the first sense node being coupled to at least one photodiode; and 
 a second transistor having its control node coupled to a second sense node, the second sense node being coupled to at least one photodiode; 
 wherein said first and second transistors are coupled in series with each other between first and second column lines. 
 
     
     
       2. The circuit of  claim 1 , wherein:
 said first sense node is coupled to a first photodiode via a first transfer transistor and to a second photodiode via a second transfer transistor; and 
 said second sense node is coupled to a third photodiode via a third transfer transistor and to a fourth photodiode via a fourth transfer transistor. 
 
     
     
       3. The circuit of  claim 2 , wherein said first, second, third and fourth photodiodes are positioned in consecutive rows of a column of a pixel array of said image sensor. 
     
     
       4. The circuit of  claim 2 , wherein said first, second, third and fourth photodiodes are positioned in a two-by-two pixel block of a pixel array of said image sensor. 
     
     
       5. The circuit of  claim 1 , wherein:
 said first transistor has a first main current node coupled to said first column line; 
 said second transistor has a first main current node coupled to said second column line; and 
 second main current nodes of said first and second transistors are coupled together. 
 
     
     
       6. The circuit of  claim 1 , further comprising:
 a first reset transistor coupled between said first sense node and a first variable voltage level node ; and 
 a second reset transistor coupled between said second sense node and a second variable voltage level node. 
 
     
     
       7. The circuit of  claim 1 , further comprising a plurality of switches configured to switch said first and second column lines between first and second configurations, wherein:
 in said first configuration, said first column line is coupled to a supply voltage level and said second column line is coupled to a column output node; and 
 in said second configuration, said second column line is coupled to said supply voltage level and said first column line is coupled to said column output node. 
 
     
     
       8. The circuit of  claim 7 , further comprising a control circuit configured to control said switches to be in one of said first and second configurations during a read operation of a voltage at said first sense node, and configured to control said switches to be in the other of said first and second configurations during a read operation of a voltage at said second sense node. 
     
     
       9. A method, comprising reading a pixel value captured by said first photodiode using the circuit of  claim 1 . 
     
     
       10. The method of  claim 9 , wherein reading said pixel value comprises:
 applying a first supply voltage to the control node of said second transistor to activate said second transistor; 
 applying a second supply voltage to one of said first and second column lines; and 
 reading said pixel value via the other of said first and second column lines. 
 
     
     
       11. The method of  claim 10 , wherein applying said first supply voltage to the control node of said second transistor comprises activating a reset transistor coupled between said second sense node and said first supply voltage. 
     
     
       12. The method of  claim 10 , wherein applying said second supply voltage to one of said first and second column lines and reading said pixel value via the other of said first and second column lines comprises controlling a plurality of switches to couple one of the first and second column lines to said second supply voltage and to couple the other of said first and second column lines to a column output node. 
     
     
       13. An apparatus, comprising:
 an image sensor comprising an array of photodiodes arranged in rows and columns, wherein each column comprises a first column line and a second column line; 
 a first read out circuit coupled to a first photodiode in a first row and first column, said first read out circuit comprising a first transistor having a control terminal coupled to said first photodiode through a first sense node and further having a first conduction terminal coupled to said first column line; 
 a second read out circuit coupled to a first photodiode in a second row and first column, said second read out circuit comprising a second transistor having a control terminal coupled to said second photodiode through a second sense node and further having a first conduction terminal coupled to said second column line; 
 wherein a second conduction terminal of said first transistor is directly connected to a second conduction terminal of said second transistor such that said first and second transistors are coupled in series with each other between first and second column lines. 
 
     
     
       14. The apparatus of  claim 13 , further comprising a processing device coupled to said image sensor. 
     
     
       15. The apparatus of  claim 13 , wherein:
 said first sense node is coupled to the first photodiode via a first transfer transistor; and 
 said second sense node is coupled to the second photodiode via a second transfer transistor. 
 
     
     
       16. The apparatus of  claim 13 , further comprising:
 a first reset transistor coupled between said first sense node and a first variable voltage level node ; and 
 a second reset transistor coupled between said second sense node and a second variable voltage level node. 
 
     
     
       17. An apparatus comprising:
 an image sensor comprising an array of photodiodes arranged in rows and columns, wherein each column comprises a first column line and a second column line; 
 a first read out circuit coupled to a first photodiode in a first row and first column, said first read out circuit comprising a first transistor having a control terminal coupled to said first photodiode through a first sense node and further having a first conduction terminal to said first column line; 
 a second read out circuit coupled to a first photodiode in a second row and first column, said second read out circuit comprising a second transistor having a control terminal coupled to said second photodiode through a second sense node and further having a first conduction terminal coupled to said second column line; 
 wherein a second conduction terminal of said first transistor is directly connected to a second conduction terminal of said second transistor; and 
 a plurality of switches configured to switch said first and second column lines between first and second configurations, wherein:
 in said first configuration, said first column line is coupled to a supply voltage level and said second column line is coupled to a column output node; and 
 in said second configuration, said second column line is coupled to said supply voltage level and said first column line is coupled to said column output node. 
 
 
     
     
       18. The apparatus of  claim 17 , further comprising a control circuit configured to control said switches to be in one of said first and second configurations during a read operation of a voltage at said first sense node, and configured to control said switches to be in the other of said first and second configurations during a read operation of a voltage at said second sense node. 
     
     
       19. The apparatus of  claim 16 , further comprising a processing device coupled to said image sensor. 
     
     
       20. The apparatus of  claim 16 , wherein:
 said first sense node is coupled to the first photodiode via a first transfer transistor; and 
 said second sense node is coupled to the second photodiode via a second transfer transistor. 
 
     
     
       21. The apparatus of  claim 16 , further comprising:
 a first reset transistor coupled between said first sense node and a first variable voltage level node ; and 
 a second reset transistor coupled between said second sense node and a second variable voltage level node.