P
US9739659B2ActiveUtilityPatentIndex 71

Optical sensor arrangement and method for light sensing

Assignee: AMS AGPriority: Oct 15, 2013Filed: Oct 15, 2014Granted: Aug 22, 2017
Est. expiryOct 15, 2033(~7.3 yrs left)· nominal 20-yr term from priority
Inventors:XU GONGGUIFITZI ANDREAS
G01J 1/4204G01J 1/46G01J 2001/446G01J 1/44H03K 17/941
71
PatentIndex Score
4
Cited by
10
References
11
Claims

Abstract

An optical sensor arrangement ( 10 ) comprises a photodiode ( 11 ) for providing a sensor current (IPD) and an analog-to-digital converter arrangement ( 12 ) which is coupled to the photodiode ( 11 ) and determines a digital value of the sensor current (IPD) in a charge balancing operation in a first phase (A) and in another conversion operation in a second phase (B).

Claims

exact text as granted — not AI-modified
We claim: 
     
       1. An optical sensor arrangement, comprising:
 a photodiode for providing a sensor current; and 
 an analog-to-digital converter arrangement which is coupled to the photodiode and determines a digital value of the sensor current in a charge balancing operation in a first phase and in another conversion operation in a second phase, 
 wherein the analog-to-digital converter arrangement comprises
 an amplifier having an amplifier input and an amplifier output, and 
 a comparator having a comparator input coupled to the amplifier output, 
 
 wherein the photodiode is coupled to the amplifier input, and 
 wherein the analog-to-digital converter arrangement comprises a resistor ladder having an output that is coupled to a further comparator input of the comparator and is designed to provide a comparator reference voltage that is controllable to the further comparator input in the second phase. 
 
     
     
       2. The optical sensor arrangement according to  claim 1 , wherein the digital value of the sensor current comprises
 a first series of bits which is determined in the first phase and comprises the most significant bit, and 
 a second series of bits which is determined in the second phase and comprises the least significant bit. 
 
     
     
       3. The optical sensor arrangement according to  claim 1 , wherein the analog-to-digital converter arrangement comprises an analog-to-digital converter coupled to the amplifier output and designed to operate in the second phase. 
     
     
       4. The optical sensor arrangement according to  claim 1 , wherein at least one of the amplifier and the comparator are used in the first phase as well as in the second phase. 
     
     
       5. An optical sensor arrangement, comprising:
 a photodiode for providing a sensor current; and 
 an analog-to-digital converter arrangement which is coupled to the photodiode and determines a digital value of the sensor current in a charge balancing operation in a first phase and in another conversion operation in a second phase, 
 wherein the analog-to-digital converter arrangement comprises
 an amplifier having an amplifier input and an amplifier output, and 
 a comparator having a comparator input coupled to the amplifier output, 
 
 wherein the photodiode is coupled to the amplifier input, 
 wherein the analog-to-digital converter arrangement comprises an integrating capacitor which is coupled between the amplifier output and the amplifier input, and 
 wherein the analog-to-digital converter arrangement comprises at least a further integrating capacitor which is coupled parallel to the integrating capacitor via a switching arrangement. 
 
     
     
       6. The optical sensor arrangement according to  claim 5 , wherein the switching arrangement, the integrating capacitor and the at least one further integrating capacitor are designed to selectively decrease or increase an input voltage at the comparator input in the second phase. 
     
     
       7. An optical sensor arrangement, comprising:
 a photodiode for providing a sensor current; and 
 an analog-to-digital converter arrangement which is coupled to the photodiode and determines a digital value of the sensor current in a charge balancing operation in a first phase and in another conversion operation in a second phase, 
 wherein the analog-to-digital converter arrangement comprises
 an amplifier having an amplifier input and an amplifier output, and 
 a comparator having a comparator input coupled to the amplifier output, 
 
 wherein the photodiode is coupled to the amplifier input, and 
 wherein the analog-to-digital converter arrangement comprises a reference capacitor which is coupled to the amplifier input and which is designed for providing a charge package to the amplifier input at least in the first phase. 
 
     
     
       8. The optical sensor arrangement according to  claim 7 , wherein the reference capacitor is designed such that a capacitance value of the reference capacitor is set by a control signal in the second phase. 
     
     
       9. The optical sensor arrangement according to  claim 7 , wherein the analog-to-digital converter arrangement comprises a switching network that is coupled to the reference capacitor and is designed to selectively decrease or increase an input voltage that is provided to the amplifier input in the second phase. 
     
     
       10. The optical sensor arrangement according to  claim 1 , wherein the analog-to-digital converter arrangement comprises a further photodiode and a further photodiode switch such that a series connection of the further photodiode and the further photodiode switch couples the amplifier input to a reference potential terminal. 
     
     
       11. An method for light sensing, comprising:
 generating a sensor current by a photodiode; 
 providing the sensor current to an analog-to-digital converter arrangement; and 
 determining a digital value of the sensor current by the analog-to-digital converter arrangement in a charge balancing operation in a first phase and in another conversion operation in a second phase, 
 wherein the analog-to-digital converter arrangement comprises an amplifier, a comparator and a resistor ladder, 
 wherein the photodiode is coupled to an amplifier input of the amplifier, an amplifier output of the amplifier is coupled to a comparator input of the comparator, and an output of the resistor ladder is coupled to a further comparator input of the comparator, and 
 wherein the resistor ladder provides a comparator reference voltage that is controllable to the further comparator input in the second phase.

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