US9787303B2ActiveUtilityPatentIndex 51
Driver circuit and switch driving method
Est. expiryDec 3, 2035(~9.4 yrs left)· nominal 20-yr term from priority
H05B 45/37H03K 2217/0063H03K 2217/0081H03K 17/063H03K 2017/066H03K 17/567H03K 17/687H05B 33/0845H05B 33/0815H02M 1/08Y02B20/30
51
PatentIndex Score
0
Cited by
8
References
16
Claims
Abstract
There are provided a driver circuit, a method of driving a power switch, and a ballast circuit. For example, there is provided a driver circuit configured to receive a control signal and operate a power switch. The driver circuit includes a first switch, a second switch, and a capacitor coupled to control terminals of the first and second switches. The driver circuit further includes a first diode coupled to a first bias terminal of the driver circuit and to the capacitor. Furthermore, the driver circuit includes a second diode coupled to a second bias terminal of the driver circuit and to a terminal of the power switch.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1. A driver circuit configured to receive a control signal and operate a power switch, the driver circuit comprising:
a first switch;
a second switch;
a capacitor coupled to control terminals of the first and second switches;
a first diode coupled to a first bias terminal of the driver circuit and to the capacitor;
a second diode coupled to a second bias terminal of the driver circuit and to a terminal of the power switch;
wherein the capacitor is configured to control a switching behavior of the power switch according to a differential voltage equal to a difference between a voltage of the first bias terminal and a logic drive voltage of a logic drive voltage port of the driver circuit.
2. The driver circuit of claim 1 , wherein the first and second switches are complementary switches.
3. The driver circuit of claim 1 , wherein the first and second switches are each metal-oxide-semiconductor field effect transistors (MOSFETs).
4. The driver circuit of claim 3 , wherein the first switch is a p-channel MOSFET and the second switch is an n-channel MOSFET.
5. The driver circuit of claim 1 , wherein the power switch is a one of (i) a silicon carbide (SiC) metal-oxide-semiconductor field effect transistor (MOSFET) and (ii) an insulated-gate bipolar transistor (IGBT).
6. The driver circuit of claim 1 , wherein the power switch is a power metal-oxide-semiconductor field effect transistor (MOSFET).
7. The driver circuit of claim 1 , wherein the second diode is a Zener diode.
8. The driver circuit of claim 1 , wherein the first bias terminal is a positive bias terminal and the second bias terminal is a negative bias terminal.
9. The driver circuit of claim 1 , wherein the first bias terminal is configured to provide a level-shifted bias from a positive bias and the second bias terminal is configured to provide a level-shifted bias from a negative bias.
10. The driver circuit of claim 1 , further comprising a control port configured to receive a control signal for driving the first and second switches.
11. A light-emitting diode (LED) ballast circuit, comprising:
a power switch;
a driver circuit configured to operate the power switch, the driver circuit including:
a first switch;
a second switch;
a capacitor coupled to control terminals of the first and second switches;
a first diode coupled to a first bias terminal of the driver circuit and to the capacitor;
a second diode coupled to a second bias terminal of the driver circuit and to a terminal of the power switch;
wherein the capacitor is configured to control a switching behavior of the power switch according to a differential voltage equal to a difference between a voltage of the first bias terminal and a logic drive voltage of a logic drive voltage port of the driver circuit.
12. The ballast circuit of claim 11 , wherein the first and second switches are complementary switches.
13. The ballast circuit of claim 11 , wherein the first and second switches are each metal-oxide-semiconductor field effect transistors (MOSFETs).
14. The ballast circuit of claim 13 , wherein the first switch is a p-channel MOSFET and the second switch is an n-channel MOSFET.
15. The ballast circuit of claim 11 , wherein the power switch is a one of (i) a silicon carbide (SiC) metal-oxide-semiconductor field effect transistor (MOSFET) and (ii) an insulated-gate bipolar transistor (IGBT).
16. The ballast circuit of claim 11 , wherein the power switch is a power metal-oxide-semiconductor field effect transistor (MOSFET).Cited by (0)
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