Logic circuit for the gathering of trace data

Abstract

A logic circuit comprises a plurality of functional logic units each having an independent clock signal and a trace bus for carrying trace data. A trace gathering logic unit collects trace data from the functional logic units, the trace gathering logic unit having a clock signal independent of the clock signals of the functional logic units and a trace bus for receiving trace data from the functional logic units; multiplexing logic for multiplexing portions of trace data from different functional logic units onto the trace bus of the trace gathering logic unit; and, synchronization logic coupled to the multiplexing logic for communicating trace data from the functional, logic units to the trace gathering logic unit based on the clock signal of the trace gathering logic unit, the synchronization logic comprising detection logic when valid trace data from the functional logic units is available for placing on the trace bus of the trace gathering logic unit, and signaling logic coupled to the detection logic for signaling to the trace gathering logic unit that valid trace data is on the trace bus.

We claim: 
     
       1. A logic circuit comprising:
 a plurality of functional logic units each having an independent clock signal and each having a trace bus for carrying trace data, wherein each trace bus is comprised of at least two parallel portions and the corresponding trace data is apportioned among the at least two portions of trace data; 
 a trace gathering logic unit for simultaneously collecting trace data from the functional logic units, the trace gathering logic unit having a clock signal independent of the clock signals of the functional logic units and a trace bus for receiving trace data from the functional logic units; 
 multiplexing logic for multiplexing the at least two portions of trace data from different functional logic units onto the trace bus of the trace gathering logic unit; and, 
 synchronization logic coupled to the multiplexing logic for communicating trace data from the functional logic units to the trace gathering logic unit based on the clock signal of the trace gathering logic unit, the synchronization logic comprising detection logic for determining when valid trace data from the functional logic units is available for placing on the trace bus of the trace gathering logic unit, and signalling logic coupled to the detection logic for signalling to the trace gathering logic unit that valid trace data is on the trace bus. 
 
     
     
       2. The logic circuit of  claim 1 , wherein, in operation, the multiplexing logic multiplexes trace data from plural functional logic units onto the trace bus of the trace gathering logic unit simultaneously. 
     
     
       3. The logic circuit of  claim 2 , wherein, in operation, the multiplexing logic multiplexes trace data from two functional logic units onto different halves of the trace bus of the trace gathering logic unit simultaneously. 
     
     
       4. The logic circuit of  claim 1 , wherein the synchronization logic comprises storage for temporarily storing trace data from one of the functional logic units pending availability of trace data from another of the functional logic units. 
     
     
       5. The logic circuit of  claim 4 , wherein the multiplexing logic is coupled to the storage to selectively place combinations of current and stored trace data on the trace bus of the trace gathering unit in dependence on control signals from the detection logic. 
     
     
       6. The logic circuit of  claim 1 , wherein the logic circuit is an integrated circuit. 
     
     
       7. A method for collecting trace data from a plurality of functional logic units in a logic circuit, each functional logic unit having an independent clock signal and a trace bus for carrying trace data, wherein each trace bus is comprised of at least two parallel portions and the corresponding trace data is apportioned among the at least two portions of trace data, the method comprising:
 providing a trace gathering logic unit for simultaneously collecting trace data from the functional logic units, the trace gathering logic unit having a clock signal independent of clock signals of the functional logic units and a trace bus for receiving trace data from the functional logic units; 
 multiplexing the at least two portions of trace data from different functional logic units onto the trace bus of the trace gathering logic unit via multiplexing logic; 
 communicating, via synchronization logic coupled to the multiplexing logic, trace data from the functional logic units to the trace gathering logic unit based on the clock signal of the trace gathering logic unit; 
 determining, via detection logic of the synchronization logic, when valid trace data from the functional logic units is available for placing on the trace bus of the trace gathering logic unit; and, 
 signalling to the trace gathering logic unit, via signalling logic of the synchronization logic, which signalling logic is coupled to the detection logic, that valid trace data is on the trace bus. 
 
     
     
       8. The method of  claim 7 , wherein the multiplexing comprises multiplexing trace data from plural functional logic units onto the trace bus of the trace gathering logic unit simultaneously. 
     
     
       9. The method of  claim 7 , wherein the multiplexing comprises multiplexing trace data from two functional logic units onto different halves of the trace bus of the trace gathering logic unit simultaneously. 
     
     
       10. The method of  claim 7 , further comprising temporarily storing trace data from one of the functional logic units pending availability of trace data from another of the functional logic units. 
     
     
       11. The method of  10 , further comprising selectively placing combinations of current and stored trace data on the trace bus of the trace gathering unit in dependence on control signals from the detection logic. 
     
     
       12. A computer programming product for collecting trace data from a plurality of functional logic units in a logic circuit, each functional logic unit having an independent clock signal and a trace bus for carrying trace data, wherein each trace bus is comprised of at least two parallel portions and the corresponding trace data is apportioned among the at least two portions of trace data, the method comprising:
 a processor, 
 a non-transitory memory coupled to the processor; and 
 logic, stored on the memory for execution on the processor for:
 providing a trace gathering logic unit for simultaneously collecting trace data from the functional logic units, the trace gathering logic unit having a clock signal independent of clock signals of the functional logic units and a trace bus for receiving trace data from the functional logic units; 
 multiplexing the at least two portions of trace data from different functional logic units onto the trace bus of the trace gathering logic unit via multiplexing logic; 
 communicating, via synchronization logic coupled to the multiplexing logic, trace data from the functional logic units to the trace gathering logic unit based on the clock signal of the trace gathering logic unit; 
 determining, via detection logic of the synchronization logic, when valid trace data from the functional logic units is available for placing on the trace bus of the trace gathering logic unit; and, 
 signalling to the trace gathering logic unit, via signalling logic of the synchronization logic, which signalling logic is coupled to the detection logic, that valid trace data is on the trace bus. 
 
 
     
     
       13. The computer programming product of  claim 12 , wherein the multiplexing logic comprises logic for multiplexing trace data from plural functional logic units onto the trace bus of the trace gathering logic unit simultaneously. 
     
     
       14. The computer programming product of  claim 12 , wherein the multiplexing logic comprises logic for multiplexing trace data from two functional logic units onto different halves of the trace bus of the trace gathering logic unit simultaneously. 
     
     
       15. The computer programming product of  claim 12 , further comprising logic for temporarily storing trace data from one of the functional logic units pending availability of trace data from another of the functional logic units. 
     
     
       16. The computer programming product of  claim 10 , further comprising logic for selectively placing combinations of current and stored trace data on the trace bus of the trace gathering unit in dependence on control signals from the detection logic.