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US9905482B2ActiveUtilityPatentIndex 71

Method of manufacturing a semiconductor device and inspecting an electrical characteristic thereof using test socket terminals

Assignee: RENESAS ELECTRONICS CORPPriority: Apr 11, 2013Filed: Aug 9, 2017Granted: Feb 27, 2018
Est. expiryApr 11, 2033(~6.8 yrs left)· nominal 20-yr term from priority
Inventors:ISHII TOSHITSUGUMAKIHIRA NAOHIROIWASAKI HIDEKAZUMATSUHASHI JUN
H10W 72/07653H10W 90/766H10W 74/00H10W 72/0198H10W 72/884H10W 72/871H10W 90/756H10W 90/753H10W 72/926H10W 72/07636H10W 72/07336H10W 90/736H10W 72/652H10W 90/00H10W 72/60H10P 74/207G01R 1/0483G01R 1/0466G01R 31/2874G01R 31/40G01R 1/06738H01L 24/36H01L 24/40H01L 2224/40095H01L 2224/32245H01L 2224/97H01L 25/50H01L 24/97H01L 2224/48247H01L 2224/73221H01L 2924/13091H01L 22/14H01L 2224/48137H01L 2224/73265H01L 2924/181H01L 2224/40245
71
PatentIndex Score
5
Cited by
31
References
12
Claims

Abstract

Improvement in yield of a semiconductor device is obtained. In addition, increase in service life of a socket terminal is obtained. A projecting portion PJ 1 and a projecting portion PJ 2 are provided in an end portion PU of a socket terminal STE 1 . Thus, it is possible to enable contact between a lead and the socket terminal STE in which a large current is caused to flow, at two points by a contact using the projecting portion PJ 1 and by a contact using the projecting portion PJ 2 , for example. As a result, the current flowing from the socket terminal STE 1 to the lead flows by being dispersed into a path flowing in the projecting portion PJ 1 and a path flowing in the projecting portion PJ 2 . Accordingly, it is possible to suppress increase of temperature of a contact portion between the socket terminal STE 1 and the lead even in a case where the large current is caused to flow between the socket terminal STE 1 and the lead.

Claims

exact text as granted — not AI-modified
The invention claimed is: 
     
       1. A method of manufacturing a semiconductor device, comprising:
 (a) providing a device to be inspected and a socket,
 the socket including a housing portion, a first socket terminal, a second socket terminal, and a third socket terminal, 
 the device to be inspected including:
 a first semiconductor chip having a low-side MOSFET, which is a component of a DC/DC converter, 
 a second semiconductor chip having a planar size smaller than a planar size of the first semiconductor chip and having a high-side MOSFET, which is a component of the DC/DC converter, 
 a first external terminal electrically connected with a source of the low-side MOSFET, 
 a second external terminal electrically connected with each of a drain of the low-side MOSFET and a source of the high-side MOSFET, 
 a third external terminal electrically connected with a drain of the high-side MOSFET, 
 a sealing body sealing the first semiconductor chip and the second semiconductor chip such that a first surface of the first external terminal, a second surface of the second external terminal, and a third surface of the third external terminal are exposed, 
 a first conductive film formed on the first surface of the first external terminal exposed from the sealing body, 
 a second conductive film formed on the second surface of the second external terminal exposed from the sealing body, and 
 a third conductive film formed on the third surface of the third external terminal exposed from the sealing body, 
 
 wherein, in cross-sectional view, each of the first socket terminal and the second socket terminal include:
 a first main portion including a first support portion; 
 a plate-like portion connected to the first support portion and including a first end portion projecting in a thickness direction of the first support portion; and 
 a plurality of projecting portions integrally provided in the first end portion, 
 
 wherein a plurality of microprojections are formed on each top surface of the plurality of projecting portions, each microprojection having a smaller projecting amount than each of the plurality of projecting portions, 
 wherein the plurality of projecting portions includes:
 a first projecting portion; and 
 a second projecting portion formed closer to a side of the first support portion than the first projecting portion and having a height lower than a height of the first projecting portion in cross-sectional view, 
 
 wherein the third socket terminal includes, in cross-sectional view:
 a second main portion including a second support portion; and 
 a second plate-like portion connected to the second support portion and including a second end portion projecting in a thickness direction of the second support portion; 
 
 
 (b) after (a), disposing the device to be inspected in the housing portion of the socket, contacting the first projecting portion of the first socket terminal with the first conductive film, contacting the first projecting portion of the second socket terminal with the second conductive film, and contacting the second end portion of the third socket terminal with the third conductive film; 
 (c) after (b), by applying a load to the device to be inspected in a thickness direction of the device to be inspected, causing the first projecting portion of the first socket terminal to slide along the first surface of the first external terminal, causing the first projecting portion of the second socket terminal to slide along the second surface of the second external terminal, and causing the second end portion of the third socket terminal to slide along the third surface of the third external terminal, thereby, contacting the second projecting portion of the first socket terminal with the first conductive film, and contacting the second projecting portion of the second socket terminal with the second conductive film; and 
 (d) after (c):
 in a case of inspecting an electrical characteristic of the first semiconductor chip, supplying a first current value to between the first socket terminal and the second socket terminal for a first time in such a state that the plurality of microprojections formed on the top surface of the first projecting portion of the first socket terminal and the plurality of microprojections formed on the top surface of the second projecting portion of the first socket terminal are contacted with the first conductive film, in such a state that the plurality of microprojections formed on the top surface of the first projecting portion of the second socket terminal and the plurality of microprojections formed on the top surface of the second projecting portion of the second socket terminal are contacted with the second conductive film, and in such a state that the second end portion of the third socket terminal is contacted with the third conductive film, and 
 in a case of inspecting an electrical characteristic of the second semiconductor chip, supplying a second current value smaller than the first current value to between the second socket terminal and the third socket terminal for a second time, in such a state that the plurality of microprojections formed on the top surface of the first projecting portion of the first socket terminal and the plurality of microprojections formed on the top surface of the second projecting portion of the first socket terminal are contacted with the first conductive film, in such a state that the plurality of microprojections formed on the top surface of the first projecting portion of the second socket terminal and the plurality of microprojections formed on the top surface of the second projecting portion of the second socket terminal are contacted with the second conductive film, and in such a state that the second end portion of the third socket terminal is contacted with the third conductive film. 
 
 
     
     
       2. The method of manufacturing a semiconductor device according to  claim 1 ,
 wherein, in (d), in the case of inspecting an electrical characteristic of the first semiconductor chip, the first socket terminal functions as an input terminal and the second socket terminal functions as an output terminal, and 
 wherein, in (d), in the case of inspecting an electrical characteristic of the second semiconductor chip, the second socket terminal functions as an input terminal and the third socket terminal functions as an output terminal. 
 
     
     
       3. The method of manufacturing a semiconductor device according to  claim 1 ,
 wherein the second time is the same as the first time. 
 
     
     
       4. The method of manufacturing a semiconductor device according to  claim 1 ,
 wherein the device to be inspected further includes:
 a third semiconductor chip having a planar size smaller than the planar size of the first semiconductor chip; 
 a fourth external terminal electrically connected to the third semiconductor chip; 
 the sealing body sealing the third semiconductor chip such that a fourth surface of the fourth external terminal is exposed; and 
 a fourth conductive film formed on the fourth surface of the fourth external terminal, 
 
 wherein, in inspecting an electrical characteristic of the third semiconductor chip, a fourth socket terminal provided in the socket is contacted with the fourth conductive film, and 
 wherein the fourth socket terminal includes:
 a third main portion including a third support portion; and 
 a third plate-like portion connected to the third support portion and including a third end portion projecting toward the device to be inspected. 
 
 
     
     
       5. The method of manufacturing a semiconductor device according to  claim 4 ,
 wherein projecting portions are not formed in the third end portion of the third plate-like portion provided in the fourth socket terminal. 
 
     
     
       6. The method of manufacturing a semiconductor device according to  claim 4 ,
 wherein a control circuit, which performs an on/off control of the low-side MOSFET and an on/off control of the high-side MOSFET, is formed in the third semiconductor chip. 
 
     
     
       7. The method of manufacturing a semiconductor device according to  claim 1 ,
 wherein the first semiconductor chip is disposed on a top surface of a first chip mounting portion, 
 wherein a rear surface of the first chip mounting portion, which is on an opposite side of the first chip mounting portion from the top surface, is exposed from the sealing body, and 
 wherein, in (d), in the case of inspecting the electrical characteristic of the first semiconductor chip, a test terminal, different in shape from each of the first socket terminal and the second socket terminal, is contacted with the rear surface of the first chip mounting portion, and, by applying a load to the device to be inspected in the thickness direction of the device to be inspected, the test terminal is caused to slide in the thickness direction of the device to be inspected. 
 
     
     
       8. The method of manufacturing a semiconductor device according to  claim 7 ,
 wherein the first chip mounting portion is electrically connected to the second socket terminal by disposing the device to be inspected in the socket, 
 wherein the test terminal is a voltage sense terminal, and 
 wherein, in (d), the electrical characteristic of the first semiconductor chip is inspected based on a voltage signal acquired from the test terminal which is contacted with the rear surface of the first chip mounting portion. 
 
     
     
       9. The method of manufacturing a semiconductor device according to  claim 8 ,
 wherein the test terminal is configured using a pogo pin, and 
 wherein a contact area between the test terminal and the first chip mounting portion is smaller than each of a contact area between the first socket terminal and the first external terminal and a contact area between the second socket terminal and the second external terminal. 
 
     
     
       10. The method of manufacturing a semiconductor device according to  claim 1 ,
 wherein the first current value is equal to or greater than 2 A. 
 
     
     
       11. The method of manufacturing a semiconductor device according to  claim 1 ,
 wherein each of the first conductive film, the second conductive film, and the third conductive film is made of a lead-free solder having a lead content equal to or less than 0.1% by weight. 
 
     
     
       12. The method of manufacturing a semiconductor device according to  claim 1 ,
 wherein the first external terminal is connected to the first semiconductor chip via a clip.

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