Semiconductor device

Abstract

Provided herein is a semiconductor device. The semiconductor device may include a substrate, conductive patterns, and a pipe gate. The substrate may have first and second regions arranged in a first direction and a third region arranged between the first and second regions. The conductive patterns may be stacked on the substrate to be spaced apart from each other, and may extend from the first region to the second region. The pipe gate may be arranged between the conductive patterns and the substrate to overlap the first region. The pipe gate may not be overlapped with the third region.

What is claimed is: 
     
       1. A semiconductor device comprising:
 a substrate including first and second regions arranged in a first direction, and a third region arranged between the first and second regions; 
 conductive patterns stacked on the substrate to be spaced apart from each other and extending from the first region to the second region; and 
 a pipe gate arranged between the conductive patterns and the substrate to overlap the first region, the pipe gate being not overlapped with the third region, 
 wherein the conductive patterns are overlapped with the third region. 
 
     
     
       2. The semiconductor device according to  claim 1 , further comprising:
 a first-type first slit placed on the third region to pass through the conductive patterns; and 
 a second slit extending from the first region to the third region, intersecting with the first-type first slit in the third region, and passing through the conductive patterns. 
 
     
     
       3. The semiconductor device according to  claim 2 , wherein the pipe gate is not overlapped with an intersecting portion of the first-type first slit and the second slit. 
     
     
       4. The semiconductor device according to  claim 1 , wherein the pipe gate includes a pipe pad pattern that protrudes laterally and is placed on the first region. 
     
     
       5. The semiconductor device according to  claim 4 , further comprising:
 a second-type first slit extending in the first direction to overlap the pipe pad pattern and passing through the conductive patterns; 
 a first slit insulating layer placed in the second-type first slit; and 
 a pipe contact plug passing through the first slit insulating layer to come into contact with the pipe pad pattern. 
 
     
     
       6. The semiconductor device according to  claim 5 , further comprising:
 a trench placed in the substrate to delimit active regions and overlapping with the pipe pad pattern and the pipe contact plug; and 
 an isolation layer filling the trench. 
 
     
     
       7. The semiconductor device according to  claim 6 , wherein the trench is formed in a mesh type. 
     
     
       8. The semiconductor device according to  claim 1 , wherein the conductive patterns include pad patterns forming a stepped structure on the second region. 
     
     
       9. The semiconductor device according to  claim 1 , wherein the pipe gate is not overlapped with the second region. 
     
     
       10. The semiconductor device according to  claim 1 , further comprising:
 a source-side channel pillar passing through the conductive patterns; 
 a drain-side channel pillar passing through the conductive patterns; and 
 a pipe channel layer embedded in the pipe gate to couple the source-side channel pillar with the drain-side channel pillar. 
 
     
     
       11. A semiconductor device comprising:
 a substrate including first and second regions arranged in a first direction, and a third region arranged between the first and second regions; 
 conductive patterns stacked on the substrate to be spaced apart from each other and extending from the first region to the second region; 
 a first slit and a second slit passing through the conductive patterns and intersecting with each other in the third region; and 
 a trench placed in the substrate to delimit the active regions and extending along the third region to overlap an intersecting portion of the first slit and the second slit. 
 
     
     
       12. The semiconductor device according to  claim 11 , wherein the trench extends to the first region and the second region to be formed in a mesh type and delimits the active regions in the first region and the second region, respectively. 
     
     
       13. The semiconductor device according to  claim 11 , wherein a pattern density of the active regions per unit area is more uniform at an area far from the third region than at an area near the third region. 
     
     
       14. The semiconductor device according to  claim 11 , wherein edge regions of the active regions close to the third region are formed to be wider than remaining regions. 
     
     
       15. The semiconductor device according to  claim 11 , further comprising:
 a pipe gate placed between the substrate and the conductive patterns and extending from the first region to the second region. 
 
     
     
       16. The semiconductor device according to  claim 15 , wherein the conductive patterns include pad patterns that form a stepped structure on the second region and expose an end of the pipe gate. 
     
     
       17. The semiconductor device according to  claim 15 , further comprising:
 a source-side channel pillar passing through the conductive patterns; 
 a drain-side channel pillar passing through the conductive patterns; and 
 a pipe channel layer embedded in the pipe gate to couple the source-side channel pillar to the drain-side channel pillar.