P
US9953894B2ActiveUtilityPatentIndex 49

Semiconductor device and manufacturing method thereof

Assignee: TOSHIBA KKPriority: Sep 16, 2016Filed: Mar 1, 2017Granted: Apr 24, 2018
Est. expirySep 16, 2036(~10.2 yrs left)· nominal 20-yr term from priority
Inventors:MASUKO SHINGOTAKADA YOSHIHARUFUJIMURA KAZUO
H10P 54/00H10P 52/00H10P 50/283H10P 14/69215H10W 46/501H10W 42/121H10W 46/00H10W 40/258H10W 40/228H10W 40/037H10W 20/40H10W 40/22H10P 14/40H01L 21/78H01L 21/4882H01L 29/0847H01L 21/31116H01L 23/3736H01L 2223/54453H01L 23/544H01L 21/02164H01L 29/41775H01L 21/304H01L 23/3675H10D 30/60H10D 64/258H10D 62/151H10D 30/021
49
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References
6
Claims

Abstract

A semiconductor device including: a semiconductor element, a substrate having a first surface on which the semiconductor element is provided, and a second surface located opposite the first surface, a metal species provided on the second surface, and a plated metal portion provided at least in part on the second surface on the metal species. The semiconductor device further includes a first region where the plated metal portion is provided and a second region where the plated metal portion is not provided are alternately arranged at a peripheral portion of the second surface.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
       1. A semiconductor device, comprising:
 a semiconductor element; 
 a substrate having a first surface on which the semiconductor element is provided, and a second surface opposite the first surface; 
 a metal species provided on the second surface; and 
 a plated metal portion provided at least in part on the second surface on the metal species; 
 wherein first regions where the plated metal portion is provided and second regions where the plated metal portion is not provided are alternately arranged at a peripheral portion of the second surface. 
 
     
     
       2. The semiconductor device according to  claim 1 , further comprising an insulating film provided on the second regions. 
     
     
       3. The semiconductor device according to  claim 2 , wherein a pattern of the plated metal portion is in a dot or mesh shape. 
     
     
       4. The semiconductor device according to  claim 2 , wherein a thickness of the plated metal portion is 0.3 μm or more and 80 μm or less. 
     
     
       5. The semiconductor device according to  claim 1 , wherein a pattern of the plated metal portion is in a dot or mesh shape. 
     
     
       6. The semiconductor device according to  claim 1 , wherein a thickness of the plated metal portion is 0.3 μm or more and 80 μm or less.

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