Ion implanted diamond metal-insulator-semiconductor field effect transistor

Abstract

A field effect transistor comprises a diamond substrate which has a p-type ion implanted region coterminous with a surface of the diamond substrate, wherein the ion implanted region has a hole concentration in the range of 1×10 15 to 1×10 17 holes/cm 2 , and a hole mobility equal to or greater than 1 cm 2 /V-sec; spaced apart source and drain electrodes formed over the p-type ion implanted region on the surface of the diamond substrate; an electrically insulating material formed over the p-type ion implanted region on the surface of the diamond substrate between the source and drain electrodes; and a gate electrode formed on the surface of the insulating material.

What is claimed is: 
     
       1. A field effect transistor, comprising: a diamond substrate which has a p-type ion implanted region coterminous with a surface of said diamond substrate;   spaced apart source and drain electrodes formed over said p-type ion implanted region on said surface of said diamond substrate;   an electrically insulating material formed over said p-type ion implanted region on said surface of said diamond substrate between said source and drain electrodes; and   a gate electrode formed on said surface of said insulating material.   
     
     
       2. The transistor of claim 1 wherein said ion implanted region of said diamond substrate is manufactured by: a) cooling and maintaininq said diamond substrate at a temperature of about 80 K.;   b) bombarding said surface of said cooled diamond substrate with about 1.5×10 14  ions per cm 2  to implant said ions in said diamond substrate, said ions having an energy of about 25 keV;   c) bombarding said surface of said cooled diamond substrate with about 2.1×10 14  ions per cm 2  to implant said ions in said diamond substrate, said ions having an energy of about 50 keV;   d) bombarding said surface of said cooled diamond substrate with about 3.0×10 14  ions per cm 2  to implant said ions in said diamond substrate, said ions having an energy of about 100 keV; and   e) after bombarding said cooled diamond substrate, placing said cooled diamond substrate in a furnace having a non-oxidizing atmosphere which is maintained at a temperature of about 1260 K. to anneal said diamond substrate and to activate said implanted ions.   
     
     
       3. The transistor of claim 2 wherein said ions are boron ions. 
     
     
       4. The transistor of claim 3 wherein said source and drain electrodes comprise: a layer of a carbide forming metal formed on said surface of said diamond substrate; and   a layer of a corrosion resistant metal formed over said carbide forming metal.   
     
     
       5. The transistor of claim 4 wherein said carbide forming metal is selected from the group consisting of molybdenum, tungsten, chromium, vanadium, niobium, tantalum, titanium, nickel, cobalt, iron, manganese, silicon, boron, zirconium, and hafnium. 
     
     
       6. The transistor of claim 5 wherein said corrosion resistant metal is selected from the group consisting of gold, platinum, palladium, and nickel. 
     
     
       7. The transistor of claim 4 wherein said gate electrode includes a first layer of an electrically conductive metal which adheres to said electrically insulating material and a second layer of a corrosion resistant and electrically conductive metal formed on said first layer. 
     
     
       8. The transistor of claim 7 wherein; said first layer includes a metal selected from the group of titanium and chromium; and   said second layer includes a metal selected from the group of gold, platinum, palladium, and nickel.   
     
     
       9. The transistor of claim 4 wherein said electrically insulating material is selected from the group of silicon dioxide, silicon nitride, and diamond. 
     
     
       10. A field effect transistor, comprising: a diamond substrate which has a p-type ion implanted region coterminous with a surface of said diamond substrate, wherein said ion implanted region has a hole concentration in the range of 1×10 15  to 1×10.sup.∫ holes/cm 3 , and a hole mobility equal to or greater than 1 cm 2  /V-sec;   spaced apart source and drain electrodes formed over said p-type ion implanted region on said surface of said diamond substrate;   an electrically insulating material formed over said p-type ion implanted region on said surface of said diamond substrate between said source and drain electrodes; and   a gate electrode formed on said surface of said insulating material.   
     
     
       11. The transistor of claim 10 wherein said ions are boron ions. 
     
     
       12. The transistor of claim 11 wherein said source and drain electrodes comprise: a layer of a carbide forming metal formed on said surface of said diamond substrate; and   a layer of a corrosion resistant metal formed over said carbide forming metal.   
     
     
       13. The transistor of claim 12 wherein said carbide forming metal is selected from the group consisting of molybdenum tungsten, chromium, vanadium, niobium, tantalum, titanium, nickel, cobalt, iron, manganese, aluminum, silicon, boron, zirconium, and hafnium. 
     
     
       14. The transistor of claim 13 wherein said corrosion resistant metal is selected from the group consisting of gold, platinum, palladium, and nickel. 
     
     
       15. The transistor of claim 14 wherein said gate electrode includes a first layer of an electrically conductive metal which adheres to said electrically insulating material and a second layer of a corrosion resistant and electrically conductive metal formed on said first layer. 
     
     
       16. The transistor of claim 15 wherein; said first layer includes a metal selected from the group of titanium and chromium; and said second layer includes a metal selected from the group of gold, platinum, palladium, and nickel.   
     
     
       17. The transistor of claim 16 wherein said electrically insulating material is selected from the group of silicon dioxide silicon nitride, and diamond.