System for performing a plurality of measurements

Abstract

A system is disclosed that performs a plurality of measurements based on a set of preprogrammed instructions. The system includes a central processing unit (CPU) that has an internal primary and expansion bus. The internal primary bus includes a program memory and the internal expansion bus includes an I/O memory. The set of preprogrammed instructions resides in the program memory and defines a predetermined type of measurement. A standard bus couples the internal primary bus to one or more standard external devices, while a custom bus couples the internal expansion bus to one or more custom external devices. The custom bus includes an analog bus that provides for analog signal transmission to one or more custom external devices. At least one of the custom external devices receives a test signal, conditions the test signal and delivers data representing the conditioned test signal to the I/O memory. The CPU receives the test data from the I/O memory, computes a measurement value based on the preprogrammed set of instructions and responsively produces measurement data having a magnitude representing the computed value.

We claim: 
     
       1. A system for performing a plurality of measurements based on a set of preprogrammed instructions, comprising: a central processing unit having an internal primary and expansion bus, the internal primary bus including a program memory and the internal expansion bus including an input/output (I/O) memory, each bus including a separate data, address and control bus, the set of preprogrammed instructions residing in the program memory and defining a predetermined type of measurement;   a standard bus for coupling the internal primary bus to one or more standard external devices, the standard bus including a digital data, address and control bus;   a custom bus for coupling the internal expansion bus to one or more custom external devices, the custom bus comprising a digital data, address and control bus, and an analog bus that provides for analog signal transmission to one or more custom external devices   a sensor for producing a test signal indicative of a sensed parameter of a test object, wherein the analog bus receives the test signal and delivers the test signal to a custom external device, the custom external device conditioning the test signal and delivering data representing the conditioned test signal via the custom digital data bus to the I/O memory; and   wherein the central processing unit receives the test data from the I/O memory, computes a measurement value based on the preprogrammed set of instructions and responsively produces measurement data having a magnitude representing the computed value.   
     
     
       2. A system, as set forth in claim 1, including a transfer means for receiving the test data and storing the test data in the I/O memory, the central processing unit executing the preprogrammed set of instructions simultaneous to the storing of the test data in the I/O memory. 
     
     
       3. A system, as set forth in claim 2, wherein the custom bus includes a plurality of sockets for receiving the custom external devices, each socket having an address that occupies a portion of the I/O memory, and including means for assigning an ID number for each custom external device at the socket address, wherein the central processing unit receives the ID number and determines the type of custom external device that is disposed in each socket of the custom bus. 
     
     
       4. A system, as set forth in claim 3, wherein the central processing unit includes a digital signal processor. 
     
     
       5. A system, as set forth in claim 4, including an operator I/O panel having a key pad with a plurality of membrane switches and a multi-character Liquid Crystal Display (LCD), each switch being pre-programmed to perform one of a plurality of functions, wherein the LCD produces alpha-numeric descriptions of a measurement value. 
     
     
       6. A system, as set forth in claim 5, wherein the custom external device includes a multi-channel analog to digital (A/D) converting device, each channel including a A/D buffer and converter, the A/D converting device receiving the test signal from the analog bus, converting the test signal from an analog waveform into representative digital values, and storing the digitized test signal in the A/D data buffer. 
     
     
       7. A system, as set forth in claim 6, wherein the A/D converting device includes a low pass filter that selectively filters predetermined frequencies of the test signal. 
     
     
       8. A system, as set forth in claim 7, wherein the digital signal processor includes an internal timer that produces a timing signal having a predetermined period, the period of the timing signal controlling the sampling rate of the A/D converting device. 
     
     
       9. A system, as set forth in claim 7, wherein the digital signal processor includes direct memory access, the direct memory access controlling the sampling rate of the A/D converting device. 
     
     
       10. A system, as set forth in claim 6, wherein the custom external device includes a multi-channel digital to analog (D/A) converting device, each channel including a D/A data buffer and converter, the D/A device receiving the measurement data, converting the measurement data from digital values into a representative analog waveform and delivering the analog measurement data to the analog bus. 
     
     
       11. A system, as set forth in claim 10, wherein the D/A converting device includes a low pass filter that selectively filters predetermined frequencies of the analog measurement data. 
     
     
       12. A system, as set forth in claim 11, wherein the digital signal processor includes direct memory access, the digital signal processor delivering the measurement data to the I/O memory for storage and the direct memory access transferring stored measurement data from the I/O memory to each D/A data buffer simultaneously. 
     
     
       13. A system, as set forth in claim 11, wherein the digital signal processor means includes direct memory access, the digital signal processor delivers the measurement data to the I/O memory for storage and the direct memory access transfers the stored measurement data from the I/O memory to each D/A data buffer sequentially. 
     
     
       14. A system, as set forth in claim 10, wherein the custom external device includes a multi-channel timing device for receiving the test signal from the analog bus, measuring the period of the test signal, and producing a frequency signal representative of the measured period.