Single digital signal processor to record digital audio data on a magneto optical disk

Abstract

Disclosed is a recorder/editor apparatus for recording and editing digital audio data. A single digital signal processor (DSP) is used to control processing of digital audio data which corresponds to up to eight simultaneous audio channels. A plurality of buffers and a direct memory access controller (DMA) are provided such that the digital audio data may be recorded and played back from a magneto optical (MO) disk drive via a SCSI.

What is claimed is: 
     
       1. A digital audio recording and editing apparatus comprising: a plurality of digital audio input channels each supplying audio data;   a signal processing circuit which processes said audio data; and   a memory device for storing said processed audio data;   wherein, said signal processing circuit comprises: a first multiplexer for receiving said audio data;   a second multiplexer connected to said first multiplexer by a plurality of address buses and a plurality of data buses;   buffer memory connected to said address and data buses between said first and second multiplexers; and   a direct memory access controller coupled to said buffer memory through said buses at a point between said first and second multiplexers.     
     
     
       2. The apparatus according to claim 1, wherein said signal processing circuit further comprises a multiplier and an arithmetic logic unit. 
     
     
       3. The apparatus according to claim 2 wherein said signal processing circuit further includes a barrel shifter, said barrel shifter receiving digital audio data from said plurality of buses via a third multiplexer and outputting said data to said arithmetic logic unit. 
     
     
       4. The apparatus according to claim 3 wherein said signal processing circuit further includes a plurality of extended precision registers which receive digital data in parallel from said multiplier and said arithmetic logic unit and provide output register digital data to a plurality of register data lines. 
     
     
       5. The apparatus according to claim 4 wherein said signal processing circuit further includes a plurality of address generators and a plurality of auxiliary register arithmetic units coupled to a plurality of auxiliary registers, said plurality of auxiliary registers each receiving digital data from said plurality of auxiliary register arithmetic units, from said multiplier and from said arithmetic logic unit. 
     
     
       6. The apparatus according to claim 3, wherein said audio data supplied to said third multiplexer is supplied over a 32-bit data line. 
     
     
       7. The apparatus according to claim 1 wherein said pluralities of buses include three data buses and four address buses. 
     
     
       8. The apparatus according to claim 1, wherein said memory device is a magneto-optical disc. 
     
     
       9. The apparatus according to claim 8, further comprising a small computer systems interface connecting said second multiplexer to said magneto-optical disc. 
     
     
       10. The apparatus according to claim 1, wherein said direct memory access controller further comprises a global control register, a source address register, a destination address register, and a transfer courier register.