P
USH2294HExpiredUtilityPatentIndex 52

Method and apparatus for programmable thermal sensor for an integrated circuit

Assignee: INTEL CORPPriority: Sep 21, 1993Filed: Mar 5, 2013Granted: Aug 7, 2018
Est. expirySep 21, 2013(expired)· nominal 20-yr term from priority
Inventors:PIPPIN JACK D
G05F 3/265Y02D10/16G06F 1/206G05D 23/19Y10T307/773G06F 11/3058G05F 3/267G06F 1/324G06F 11/3024G06F 11/3093Y02D10/00
52
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Claims

Abstract

A programmable thermal sensor is implemented in an integrated circuit such as a microprocessor. The programmable thermal sensor monitors the temperature of the integrated circuit, and generates an output to indicate that the temperature of the integrated circuit has attained a pre-programmed threshold temperature. In a microprocessor implementation, the microprocessor contains a processor unit, an internal register, microprogram and clock circuitry. The microprogram writes programmable input values, corresponding to threshold temperatures, to the internal register. The programmable thermal sensor reads the programmable input values, and generates an interrupt when the temperature of the microprocessor reaches the threshold temperature. In addition to a programmable thermal sensor, the microprocessor contains a fail safe thermal sensor that halts operation of the microprocessor when the temperature attains a critical temperature.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
       1. A computer system comprising:
 an active cooling device; 
 a microprocessor comprising:
 a register storing a register value corresponding to a threshold temperature; 
 a programmable thermal sensor receiving the register value, wherein the programmable thermal sensor generates a first interrupt signal if a microprocessor temperature exceeds the threshold temperature, 
 
 wherein the active cooling device is activated in response to the first interrupt signal, and 
 wherein the active cooling device comprises a fan; and 
 clock circuitry for providing a clock signal for the microprocessor, 
 wherein a frequency of the clock signal is reduced in response to the first interrupt signal.

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