P
USRE35496EExpiredUtilityPatentIndex 62

Semiconductor device and method of producing the same

Assignee: MITSUBISHI ELECTRIC CORPPriority: Oct 30, 1991Filed: Sep 8, 1995Granted: Apr 29, 1997
Est. expiryOct 30, 2011(expired)· nominal 20-yr term from priority
Inventors:YAMAMURA KENUEDA NAOTOMICHII KAZUNARIFUJIMOTO HITOSHITSUMURA KIYOAKISASAKI HITOSHIMIYAMOTO TAKASHI
H10W 90/756H10W 74/00H10W 72/9445H10W 72/07533H10W 72/07521H10W 72/07141H10W 72/5522H10W 72/5449H10W 72/5363H10W 72/951H10W 72/932H10W 72/581H10W 72/536H10W 72/59H10W 70/442H10W 70/427H10W 70/415H10W 70/411H10W 72/0198Y10T29/49146Y10T29/49171Y10T29/49169Y10T29/49158
62
PatentIndex Score
3
Cited by
8
References
12
Claims

Abstract

A semiconductor device of the present invention accommodates a large semiconductor chip in a downsized package without impairing its reliability. The semiconductor chip is bonded on a relatively small die pad. Common inner leads and a plurality of inner leads are disposed opposite and spaced from the semiconductor chip by a gap ranging from 0.1 mm to 0.4 mm and the gap between the semiconductor chip and the common inner leads and the plurality of inner leads is filled with a resin which forms pan of a resin package.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
       1. A semiconductor device comprising: a semiconductor chip having a first surface, an opposed second surface, and a plurality of electrode pads linearly disposed substantially on a longitudinal center line of the first surface of said semiconductor chip;   a die-pad bonded to the second surface of said semiconductor chip to support the chip and having a smaller area than said semiconductor chip;   at least one common inner-lead disposed opposite and spaced from the first surface of said semiconductor chip and substantially parallel to the longitudinal center line;   a plurality of inner leads disposed adjacent to corresponding electrode pads opposite and spaced from the first surface of said semiconductor chip;   a plurality of metallic wires electrically connecting respective electrode pads with one of the common inner-lead and the corresponding inner lead;   a resin package encapsulating said semiconductor chip, said die-pad, said common inner-lead, said plurality of inner leads, and said plurality of wires;   at least one common outer-lead integrally connected with said common inner-lead and exposed outside said resin package; and   a plurality of outer leads, each outer lead being unitary with a corresponding inner lead and exposed outside said resin package wherein said common inner-lead and said plurality of inner leads are spaced from the first surface of said semiconductor chip by a gap ranging from 0.1 mm to 0.4 mm and the gap is filled with resin that is part of said resin package.   
     
     
       2. The device as defined in claim 1 wherein said common inner-lead is divided at a center of said longitudinal center line into two sections. 
     
     
       3. The device as defined in claim 1 including at least one supporting inner-lead connected centrally to each common inner-lead for supporting the respective connected common inner-lead. 
     
     
       4. The device as defined in claim 1 wherein the gap between the first surface of said semiconductor chip and said at least one common inner-lead is not greater than the gap between the first surface of the chip and said plurality of inner leads. 
     
     
       5. The device as defined in claim 1 including a die-pad located adjacent to each longitudinal end of said semiconductor chip. 
     
     
       6. The device as defined in claim 1 wherein each inner lead includes an end bent to contact and contacting said semiconductor chip. 
     
     
       7. The device as defined in claim 1 including an insulating film disposed directly on each of said common inner-leads, said insulating film being interposed between each of said common inner-leads and said wires. 
     
     
       8. The device as defined in claim 1 including a block on each of said inner leads to prevent said wires from contacting said at least one common inner-lead. 
     
     
       9. The device as defined in claim 1 including a chamfered portion on each common inner-lead adjacent to said inner leads. 
     
     
       10. The device as defined in claim 1 including a recess in each common inner-lead where one of said wires crosses said common inner-lead. 
     
     
       11. A semiconductor device comprising: a semiconductor chip having a first surface, an opposed second surface, a first pad-group including a plurality of electrode pads linearly disposed substantially on a longitudinal center line of the first surface of said semiconductor chip, and second and third pad-groups, each including a plurality of electrode pads linearly disposed on opposite sides of the first pad-group;   a die-pad bonded to the second surface of said semiconductor chip to support the chip and having a smaller area than said semiconductor chip;   first and second common inner-leads disposed opposite and spaced from the first surface of said semiconductor chip and disposed on opposite sides of the first pad-group between the second and third pad-groups:   a plurality of inner leads spaced from and opposite the first surface of said semiconductor chip beyond the second and third electrode-pad groups;   a plurality of metallic wires electrically connecting each first electrode pad with a corresponding one of the first and second common inner-leads and electrically connecting respective pads of the second and third pad-groups with corresponding inner leads;   a resin package encapsulating said semiconductor chip, said die-pad, the first and second common inner-leads, said plurality of inner leads, and said plurality of wires;   first and second common outer-leads respectively integrally connected with the first and second common inner-leads and each exposed outside said resin package; and   a plurality of outer leads, each outer lead being unitary with a corresponding inner lead and exposed outside said resin package wherein the first and second common inner-leads and said plurality of inner leads are spaced from the first surface of said semiconductor chip by a gap ranging from 0.1 mm to 0.4 mm and the gap is filled with resin that is part of said resin package.   
     
     
       12. A method of producing a semiconductor device comprising the steps of: preparing a semiconductor chip which has a first surface, a second surface opposite the first surface and a plurality of electrode pads linearly disposed on a longitudinal center line of the first surface of said semiconductor chip;   placing said semiconductor chip on a first lead frame having a die-pad smaller in area than said semiconductor chip;   bonding said die-pad of the first lead frame and a second surface of said semiconductor chip;   positioning a second lead frame, including at least one common inner-lead and a plurality of inner leads disposed adjacent to said common inner-lead, opposite and spaced from said tint surface of said semiconductor chip to maintain a gap between the first surface of said semiconductor chip and said common inner-lead and said plurality of inner leads of 0.1 mm to 0.4 mm;   wire-bonding each of said plurality of electrode pads of said semiconductor chip to one of the common inner-lead and a corresponding inner lead; and   sealing said semiconductor chip, said die-pad, said common inner-lead, and said plurality of inner leads in a resin including between said first surface of said semiconductor chip and the second lead frame. .Iadd.13. A semiconductor device comprising:   a semiconductor chip having a first surface, an opposed second surface, and a plurality of electrode pads linearly disposed substantially on a longitudinal center line of the first surface of said semiconductor chip;   a die-pad bonded to the second surface of said semiconductor chip to support the chip and having a smaller area than said semiconductor chip;   at least one common inner-lead disposed opposite and spaced from the first surface of said semiconductor chip and substantially. parallel to the longitudinal center line;   a plurality of inner leads disposed adjacent to corresponding electrode pads opposite and spaced from the first surface of said semiconductor chip;   a plurality of metallic wires electrically connecting respective electrode pads with one of the common inner-lead and the corresponding inner lead;   a resin package encapsulating, said semiconductor chip, said die-pad, said common inner-lead, said plurality of inner leads, and said plurality of wires;   at least one common outer-lead integrally connected with said common inner-lead and exposed outside said resin package; and   a plurality of outer leads, each outer lead being unitary with a corresponding inner lead and exposed outside said resin package wherein said common inner-lead and said plurality of inner leads are spaced from the first surface of said semiconductor chip by a gap filled with resin   
     
     
        that is pan of said resin package..Iaddend..Iadd.14. A semiconductor device comprising: a semiconductor chip having a first surface, an opposed second surface, a first pad-group including a plurality of electrode pads linearly disposed substantially on a longitudinal center line of the first surface of said semiconductor chip, and second and third pad-groups, each including a plurality of electrode pads linearly disposed on opposite sides of the first pad-group;   a die-pad bonded to the second surface of said semiconductor chip to support the chip and having a smaller area than said semiconductor chip;   first and second common inner-leads disposed opposite and spaced from the first surface of said semiconductor chip and disposed on opposite sides of the first pad-group between the second and third pad-group;   a plurality of inner leads spaced from and opposite the first surface of said semiconductor chip beyond the second and third electrode-pad groups:   a plurality of metallic wires electrically connecting each first electrode pad with a corresponding one of the first and second common inner-leads and electrically connecting respective pads of the second and third pad-groups with corresponding inner leads;   a resin package encapsulating said semiconductor chip, said die-pad, the first and second common inner leads, said plurality of inner leads and said plurality of wires;   first and second common outer-leads respectively integrally connected with the first and second common inner-leads and each exposed outside said resin package; and   plurality of outer leads, each outer lead being unitary with a corresponding inner-lead and exposed outside said resin package wherein the first and second common inner-leads and said plurality of inner leads are spaced from the first surface of said semiconductor chip by a gap filled with resin that is part of said resin package..Iaddend..Iadd.15. A method of producing a semiconductor device comprising the steps of:   preparing a semiconductor chip which has a first surface, a second surface opposite the first surface, and a plurality of electrode pads linearly disposed on a longitudinal center line of the first surface of said semiconductor chip;   placing said semiconductor chip on a first lead frame having a die-pad smaller in area than said semiconductor chip;   bonding said die-pad of the first lead frame and a second surface of said semiconductor chip;   positioning a second lead frame, including at least one common inner-lead and a plurality of inner leads disposed adjacent to said common inner-lead, opposite and spaced from said first surface of said semiconductor chip to maintain a gap between the first surface of said semiconductor chip and said common inner-lead and said plurality of inner-leads;   wire-bonding each of said plurality of electrode pads of said semiconductor chip to one of the common inner-lead and a corresponding inner lead; and   sealing said semiconductor chips said die-pad, said common inner-lead, and said plurality of inner leads in a resin including between, said first surface of said semiconductor chip and the second lead frame..Iaddend.

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