CMOS voltage reference with stacked base-to-emitter voltages

Abstract

A band-gap voltage reference forming part of a CMOS IC chip. A ΔV BE voltage is developed by stacked pairs of parasitic bipolar transistors, with the transistors of each pair operated at different current densities. MOS buffer transistors are connected at corresponding ends of the stacks where the ΔV BE voltage is developed. The bipolar transistors are driven by MOS current sources.

What is claimed is: 
     
       1. In an IC chip formed with a plurality of CMOS transistors together with a plurality of parasitic bipolar transistors having two current-carrying electrodes and a base electrode; a band-gap voltage reference comprising: a plurality of selected pairs of said bipolar transistors;   said transistor pairs being divided into two sub-sets each comprising one transistor from each pair;   current means supplying to all of the transistors of said selected pairs controlled currents having magnitudes such that the current densities of the individual transistors of each pair are different;   one like current-carrying electrode of said paired transistors being connected to a common reference potential;   the other current-carrying electrode of each of said paired transistors being connected to the base electrode of another transistor of the same sub-set to form interconnected strings of transistors making up said sub-sets;   means connecting together like electrodes of two common-end transistors of each of said strings of transistors;   resistor means;   first circuit means coupling one electrode of one of the two transistors at the ends of said strings of transistors which are opposite said common ends to one end of said resistor means; and   second circuit means coupling one of the electrodes of the other of said two transistors to the other end of said resistor means, thereby to develop a ΔV BE  voltage across said resistor means directly from the ends of said strings of transistors.   
     
     
       2. A voltage reference as claimed in claim 1, wherein said bipolar transistors are PNP type. 
     
     
       3. A voltage reference as claimed in claim 2, wherein said like electrodes are the collector electrodes of said paired transistors. 
     
     
       4. A voltage reference as claimed in claim 1, wherein said like electrodes of said common-end transistors are base electrodes. 
     
     
       5. A voltage reference as claimed in claim 1, wherein said circuit means comprises buffer MOS transistors connected respectively to the opposite-end transistors of said strings of transistors. 
     
     
       6. A voltage reference as claimed in claim 5, including transistor means to develop a voltage proportional to V BE  connected in series with said ΔV BE  voltage. 
     
     
       7. A voltage reference as claimed in claim 1, including MOS current-source transistors connected respectively in series with the individual transistors of said pairs of transistors to set the current levels therethrough. 
     
     
       8. A voltage reference as claimed in claim 7, wherein said current-source transistors have gates connected in common to provide for ratioing of the currents produced. 
     
     
       9. In an IC chip as in claim 1, wherein the transistors of one of said sub-sets have emitter areas larger than the transistors of the other of said sub-sets; said current means supplying currents to the transistors of said one sub-set of transistors which are smaller in magnitude than the currents supplied to the transistors of said other sub-set of transistors.   
     
     
       10. In an IC chip formed with a plurality of CMOS transistors together with a plurality of parasitic bipolar transistors having two current-carrying electrodes and a base electrode; a band-gap voltage reference comprising: a plurality of selected pairs of said bipolar transistors;   said transistor pairs being divided into two sub-sets each comprising one transistor from each pair;   current means supplying to all of the transistors or said selected pairs controlled currents having magnitudes such that the current densities of the individual transistors of each pair are different;   one current-carrying electrode of each of said paired transistors being connected to the base electrode of another transistor of the same sub-set to form interconnected strings of transistors making up said sub-sets;   means connecting together like electrodes of two common-end transistors of each of said strings of transistors;   first and second MOS transistors connected respectively to the transistors at the ends of said strings of transistors which are opposite said common ends;   resistor means; and   circuit means coupling said first and second MOS transistors to the ends of said resistor means respectively for developing a ΔV BE  voltage across said resistor means.   
     
     
       11. A voltage reference as claimed in claim 10, wherein said bipolar transistors are PNP types; and means connecting the emitters of the two transistors at said opposite ends of said strings to the gates of said first and second MOS transistors.   
     
     
       12. A voltage reference as claimed in claim 9, including third and fourth MOS transistors connected respectively in series with said first and second MOS transistors to serve as a current mirror to force the currents through said first and second MOS transistors to be the same. 
     
     
       13. A voltage reference as claimed in claim 12, including a fifth MOS transistor connected in series with said resistor means, with one current-carrying electrode connected directly to one end of said resistor means which is opposite the end to which said first MOS transistor is connected; and a sixth MOS transistor connected in series with said second MOS transistor, with one current-carrying electrode connected directly to a current-carrying electrode of said second MOS transistor;   whereby the potential at said opposite-end transistor connected to said second MOS transistor is effectively transferred to said one resistor means end, thereby to develop the net ΔV BE  voltage across said resistor means.   
     
     
       14. A voltage reference as claimed in claim 9, including third and fourth common-gate MOS transistors connected in series with said first and second MOS transistors, respectively, to serve as a current mirror to force the currents through said first and second MOS transistors to be equal; a fifth MOS transistor to produce current ratioed with that of said first MOS transistor;   second resistor means connected in series with said fifth MOS transistor to produce a voltage proportional to ΔV BE , and   second circuit means in series with said second resistor means to produce a V BE  voltage to be added to said ΔV BE  voltage across said second resistor means;   whereby to develop a final output voltage having a low temperature coefficient.   
     
     
       15. A voltage reference as claimed in claim 14, wherein said second circuit means comprises an additional bipolar transistor connected in series with second resistor means. 
     
     
       16. A voltage reference as claimed in claim 15, including third resistor means connected between the base and emitter of said additional bipolar transistor; and fourth resistor means connected between the base and collector of said additional transistor.   
     
     
       17. A voltage reference as claimed in claim 14, including an additional bipolar transistor having its base connected to one end of said second resistor means; and an output terminal connected to the emitter of said additional bipolar transistor.   
     
     
       18. In an IC chip formed with a plurality of bipolar transistors each having two current-carrying electrodes and a base electrode; a band-gap voltage reference comprising: a first set of pairs of said bipolar transistors of one polarity;   said first set of pairs being divided into first and second sub-sets each comprising one transistor from each pair;   first current means supplying to all of the transistors of said first set of pairs controlled currents having magnitudes such that the current densities of the individual transistors of each pair are different;   emitter electrodes of the transistors of said first and second sub-sets being connected to respective base electrodes of adjacent transistors of the same sub-set to form first and second interconnected strings of transistors making up said first and second sub-sets respectively;   means connecting together like electrodes of two common-end transistors of each of said first and second strings of transistors;   a second set of pairs of said bipolar transistors or polarity opposite said one polarity;   said second set of pairs being divided into third and fourth sub-sets each comprising one transistor from each pair;   second current means supplying to all of the transistors of said second set of pairs controlled currents having magnitudes such that the current densities of the individual transistors of each pair are different;   emitter electrodes of the transistors or said third and fourth sub sets being connected to respective base electrodes of adjacent transistors of the same sub-set to form third and fourth interconnected strings of transistors making up said third and fourth sub-sets;   means connecting the ends of said first and second strings which are opposite said common end to corresponding ends of said third and fourth strings of transistors; and   circuit means connected to the two transistors at the ends of said third and fourth strings of transistors which are opposite said corresponding ends for developing a ΔV BE  voltage.   
     
     
       19. A voltage reference as claimed in claim 18, wherein said current means comprise MOS current source transistors having the same polarity as the bipolar transistors for which they supply current. 
     
     
       20. A voltage reference as claimed in claim 19, wherein said first and second strings of transistors are PNP type; said current sources for said first and second strings of transistors comprising PMOS transistors.   
     
     
       21. In an IC chip formed with a plurality of CMOS transistors together with a plurality of parasitic bipolar transistors having two current-carrying electrodes and a base electrode; a band-gap voltage reference comprising: a plurality of selected pairs of said bipolar transistors;   said transistor pairs being divided into two sub-sets each comprising one transistor from each pair;   the emitter areas of said first sub-set transistors being substantially different from the emitter areas of said second sub-set transistors;   first current means supplying to all of the transistors of said first sub-set controlled currents of predetermined magnitudes;   second current means supplying to all of the transistors of said second sub-set controlled currents of magnitudes substantially different from the current magnitudes of said first sub-set transistors and having such magnitudes that the current densities of the individual transistors of each pair are different;   one current-carrying electrode of each of said paired transistors being connected to the base electrode of another transistor of the same sub-set to form interconnected strings of transistors making up said sub-sets;   means connecting together like electrodes of two common-end transistors of each of said strings of transistors; and   circuit means connected to the transistors at the ends of said strings of transistors which are opposite said common ends for developing a ΔV BE  voltage.   
     
     
       22. A voltage reference as claimed in claim 21, wherein the emitter areas of said first sub-set transistors are larger than the emitter areas of said second sub-set transistors; and the currents supplied to said first sub-set transistors are smaller than the currents supplied to said second sub-set transistors;   whereby the current densities of said first sub-set transistors are made substantially smaller than the current densities of said second sub-set transistors, both by the emitter area differentials and by the current differentials. .Iadd.   
     
     
       23.  In an IC chip formed with a plurality of CMOS transistors together with a plurality of parasitic bipolar transistors having two current-carrying electrodes and a base electrode; a band-gap voltage reference comprising: a plurality of selected pairs of said bipolar transistors;   said transistor pairs being divided into two sub-sets each comprising one transistor from each of said pairs;   the emitter areas of said first sub-set transistors being substantially different from the emitter areas of said second sub-set transistors;   first current means supplying to all of the transistors of said first sub-set controlled currents of predetermined magnitudes;   second current means supplying to all of the transistors of said second sub-set controlled currents of magnitudes substantially different from the current magnitudes of said first sub-set transistors and having such magnitudes that the current densities of the individual transistors of each pair are different, one current-carrying electrode of each of said paired transistors being connected to the base electrode of another transistor of the same sub-set to form interconnected strings of transistors making up said sub-sets;   there being a first pair of common-end transistors represented by the transistors at one set of corresponding ends of said strings of transistors;   there being a second pair of common-end transistors represented by the transistors at the respective ends of said strings of transistors opposite said corresponding ends;   means intercoupling like electrodes of the two transistors of one of said pairs of common-end transistors of said strings of transistors in such a way that the potentials of said like electrodes track; and   circuit means coupled to the other of said pairs of common-end transistors for developing a ΔV BE  voltage..Iaddend..Iadd.   
     
     
       24.  The method of developing a reference voltage comprising: interconnecting a first group of bipolar transistors in a first string to combine their V BE  voltages so as to develop a first cumulative V BE  voltage;   interconnecting a second group of bipolar transistors in a second string to combine their V BE  voltages so as to develop a second cumulative V BE  voltage;   there being for each of said first-group transistors a corresponding second-group transistor, thereby forming associated pairs of transistors;   the emitter area of each of said first-group transistors being different from the emitter area of the corresponding second-group transistor of the associated pair of transistors;   supplying to said first-group transistors currents of predetermined magnitudes;   supplying to said second-group transistors currents of predetermined magnitudes such that the current in one transistor of each of said associated pairs is different from the current in the other transistor of the associated pair;   intercoupling like electrodes of the two transistors which form an associated pair of transistors at one common end of said strings of transistors to provide that the electrode potentials track; and   coupling circuit means to the two transistors which form an associated pair at the other common end of said strings of transistors to develop a ΔV BE  voltage..Iaddend.