Programmable device for storing digital video lines

Abstract

A programmable device for storing digital video lines, being of a type intended for use in TV sets with digital frame scan features whereby a video line is sample coded in a digital signal, comprises at least one pair of memories each adapted to contain the code of one video line, and a bank of registers connected in series to one another and to each of the memories, at least one of the registers being fed, at its input terminals, with the digital signal to parallel the samples to be input to the memories.

We claim: 
     
       1. A programmable device for storing digital video lines, the device being of a type intended for use in digital frame scan TV set wherein a video line is sample encoded in a digital signal to provide code samples, comprising at least one pair of memories, each adapted to contain code corresponding to one video line, a bank of registers connected in series with one another and also connected to each of said memories, at least one of said registers receiving on its input said digital signal for paralleling said samples for application to said memories, a control circuit having outputs connected to each of said memories for selecting different operation modes for storing said code samples, and an additional register connected downstream from said bank of registers and having an output at which the code of a video line sample preceding the video line which is going to be stored is output. 
     
     
       2. A device according to claim 1, in which said memories have respective data inputs connected to each output of said bank of registers. 
     
     
       3. A device according to claim 1, which includes a multiplexer having inputs connected to corresponding outputs of said memories and having outputs at which the codes of video lines preceding the video line in process to be stored, are presented. 
     
     
       4. A device according to claim 3, in which sequencer blocks for sequencing samples output by the memories in parallel form are connected to each of the respective multiplexer outputs. 
     
     
       5. A device according to claim 1, provided as a single integrated circuit. .Iadd. 
     
     
       6.  A programmable device for storing digital video lines, wherein a video line is sample encoded in a digital signal including code samples, the device comprising: at least one pair of memories, each adapted to store the code samples corresponding to one video line;   a bank of registers connected in series with one another and also connected to each of said memories, at least one of said registers receiving on its input said digital signal for paralleling said code samples for application to said memories; and   an additional register connected downstream from said bank of registers and having an output at which a code sample of a video line preceding the video line stored in the at least one pair of memories is output. .Iaddend..Iadd.   
     
     
       7.  A device according to claim 6, in which said memories have respective data inputs connected to each output of said bank of registers. .Iaddend..Iadd.8. A device according to claim 6, which includes a multiplexer having inputs connected to corresponding outputs of said memories and having outputs at which the codes of video lines preceding the video line in process to be stored, are presented. .Iaddend..Iadd.9. A device according to claim 8, in which sequencer blocks for sequencing samples output by the memories in parallel form are connected to each of the respective multiplexer outputs. .Iaddend..Iadd.10. A device according 
     
     
        to claim 6, provided as a single integrated circuit. .Iaddend..Iadd.11.  A programmable device for storing digital video lines, the device being of a type used in digital frame scan TV sets wherein a video line is sample encoded in a digital signal including code samples, the device comprising: at least one pair of memories, each adapted to contain the code samples corresponding to one video line;   a bank of registers connected in series with one another and also connected to each of said memories, at least one of said registers receiving on its input said digital signal for paralleling said code samples for application to said memories; and   an additional register connected downstream from said bank of registers and having an output at which a code sample of a video line preceding the   
     
     
        video line stored in the pair of memories is output. .Iaddend..Iadd.12.  A device according to claim 11, in which said memories have respective data inputs connected to each output of said bank of registers. .Iaddend..Iadd.13. A device according to claim 11, which includes a multiplexer having inputs connected to corresponding outputs of said memories and having outputs at which the codes of video lines preceding 
     
     
        the video line in process to be stored, are presented. .Iaddend..Iadd.14. A device according to claim 13, in which sequencer blocks for sequencing samples output by the memories in parallel form are connected to each of the respective multiplexer outputs. .Iaddend..Iadd.15. A device according 
     
     
        to claim 11, provided as a single integrated circuit. .Iaddend..Iadd.16. A method of storing digital video lines, wherein a video line is sample encoded in a digital signal including a serial sequence of code samples, comprising the steps of: storing in at least one pair of memories, the code samples corresponding to one video line;   paralleling said serial sequence of code samples prior to storing in said memories; and   providing simultaneous with the step of paralleling, an output including a code sample of a video line preceding the video line which is stored. .Iaddend..Iadd.17. A method according to claim 16, further comprising the step of:   sequencing the code samples output by the memories and the output of the step of providing, all in parallel, to form an output serial sequence of the code samples. .Iaddend..Iadd.18. A method according to claim 17, wherein the step of sequencing further comprises:   delaying in the pair of memories two video lines;   outputting from the pair of memories the two delayed video lines; and   outputting the code sample of the video line preceding the video line which   
     
     
        is stored. .Iaddend..Iadd.19.  A method according to claim 17, wherein the step of sequencing further comprises: outputting a complete contents from one of the pair of memories twice while a second of the pair of memories has stored therein the video line. .Iaddend..Iadd.20. A method according to claim 17, wherein the step of sequencing further comprises:   outputting one-half of a complete contents from one of the pair of memories during a time when a second of the pair of memories has stored therein the video line. .Iaddend..Iadd.21. A programmable device for storing digital video lines, wherein a video line is sample encoded in a digital signal including code samples, the device comprising:   a memory in which are stored the code samples corresponding to a plurality of video lines;   a plurality of code sample registers connected in series, each register having an output, the outputs connected to the memory in parallel, whereby the video line is stored therein; and   an additional register connected to receive an output of a last of the plurality of code sample registers and having an output carrying a code   
     
     
        sample of a preceding video line. .Iaddend..Iadd.22.  The device of claim 21, wherein the memory further comprises: an input port, to which the outputs of the plurality of registers are connected; and   an output port, through which the video line is retrieved;   the input port and the output port separately addressable to allow simultaneous storing and retrieving. .Iaddend..Iadd.23. A programmable device for storing digital video lines, wherein a video line is sample encoded in a digital signal including code samples, the device comprising:   means for storing the code samples corresponding to a plurality of video lines having a parallel input and an output;   means connected to receive the digital signal as a sequence of the code samples, for converting the digital signal to a parallel format digital signal corresponding to the video line, the parallel format digital signal provided at a parallel output connected to the parallel input of the means for storing; and   means connected to the parallel output and having a code sample output for providing a code sample from a preceding video line. .Iaddend..Iadd.24. The device of claim 23, wherein the means for storing further comprises:   a plurality of independently addressable memory circuits. .Iaddend.