Semiconductor package for a semiconductor chip having centrally located bottom bond pads
Abstract
A semiconductor package having outer leads which are not protruded from the package but only exposed to outside. The semiconductor package comprises a semiconductor chip which is formed with a plurality of bond pads at a central portion of its bottom surface, a lead frame including leads connected to bond pads for input/output of the bond pads respectively and bus bars connected to power supplying pads of the bond pads, insulation adhesives for attaching inner leads of the leads and inner leads of the bus bars to a bottom surface of the semiconductor chip formed with the bond pads, metal wires for electrically connecting the inner leads of the leads and the inner leads of the bus bars to the bond pads respectively, and a molding compound enveloping the semiconductor chip assembly with outer leads of the lead frame exposed to outside. The adhesive tapes are removed after a molding procedure.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1. A semiconductor package comprising: a semiconductor chip with a plurality of bond pads including at least one power supplying bond pad at a central portion of a bottom surface of said semiconductor chip; a plurality of leads connected to bond pads for input/output of said bond pads, respectively, each of said leads defining an inner lead and an outer lead; at least one bus bar connected to said at least one power supplying bond pad, said at least one bus bar defining an inner lead and an outer lead; insulation . .adhesives.!. .Iadd.adhesive .Iaddend.for attaching said inner leads of each of the leads and said at least one bus bar to said bottom surface of the semiconductor chip; metal wires for electrically connecting the inner leads of the leads and the at least one bus bar to the bond pads, respectively; and a molding compound . .enveloping.!. .Iadd.formed completely around .Iaddend.the semiconductor chip. .,.!. and .Iadd.also formed around .Iaddend.the inner leads and the bus bar with bottom surfaces of said outer leads of the leads and the bus bar exposed to outside on the bottom surface of said molding compound.Iadd., wherein the outer leads are flush with the bottom surface of said molding compound.Iaddend..
2. A semiconductor package according to claim 1, wherein . .said.!. .Iadd.the outer leads are shaped in a manner to be attachable to .Iaddend.adhesive tapes . .are.!. .Iadd.comprising .Iaddend.polyimide . .based tapes.!..Iadd., wherein the adhesive tapes serve to hold the leads in an integral manner.Iaddend..
3. A semiconductor package according to claim 1, wherein said adhesive is an insulating film.
4. A semiconductor package according to claim 1, wherein said adhesive is insulating paste.
5. A semiconductor package according to claim 1, wherein said metal wires are gold wires.
6. A semiconductor package according to claim 1, wherein said metal wires are aluminum wires. .Iadd.7. A semiconductor package, comprising: a semiconductor chip; a plurality of contoured leads attached to the semiconductor chip with an insulator and having at least a first portion and a second portion, wherein the contoured leads extend away from a bottom surface of the semiconductor package to provide for wire bonding of the leads to the semiconductor chip; connectors electrically connecting the chip to the first portion of the leads; and a molding compound formed completely around the chip and also formed around the connectors and at least the first portion of the leads, wherein the second portion of the leads is exposed to provide electrical connection points, wherein the exposed second portion of the leads is positioned on and flush with the bottom surface of the semiconductor package..Iaddend..Iadd.8. The semiconductor package of claim 7, wherein the leads are elongated..Iaddend..Iadd.9. The semiconductor package of claim 7, wherein the semiconductor chip has a length, wherein the leads extend along the length of the semiconductor chip..Iaddend..Iadd.10. The semiconductor package of claim 7, wherein the semiconductor chip has a major surface on which are formed circuit elements, wherein the leads are attached to the major surface by an insulating adhesive..Iaddend..Iadd.11. The semiconductor package of claim 10, wherein the leads are attached at a central portion of the major surface..Iaddend..Iadd.12. The semiconductor package of claim 10, wherein the insulating adhesive comprises an
insulating film..Iaddend..Iadd.13. The semiconductor package of claim 10, wherein the insulating adhesive comprises an insulating paste..Iaddend..Iadd.14. The semiconductor package of claim 7, wherein at least one of the leads comprises a power supply bus bar..Iaddend..Iadd.15. The semiconductor package of claim 14, wherein the power supply bus bar is attached to a central portion of the semiconductor chip..Iaddend..Iadd.16. The semiconductor package of claim 7, wherein the connectors comprise bonding wires..Iaddend..Iadd.17. The semiconductor package of claim 7, wherein the electrical connection points provide electrical connections for connecting the semiconductor package to a printed circuit board..Iaddend..Iadd.18. The semiconductor package of claim 7, wherein the exposed second portions of the leads do not extend beyond the bottom surface of the semiconductor package..Iaddend..Iadd.19. A semiconductor package, comprising: a semiconductor chip; a plurality of contoured leads attached to the semiconductor chip with an insulator and having at least a first portion and a second portion; connectors electrically connecting the chip to the first portion of the leads; and a molding compound formed completely around the chip and also formed around the connectors and at least the first portion of the leads, wherein the second portion of the leads is exposed to provide electrical connection points, wherein the exposed second portion of the leads is positioned on and flush with a bottom surface of the semiconductor package, and wherein the exposed second portion of the leads comprise less than a majority portion of the area of the bottom surface..Iaddend..Iadd.20. The semiconductor package of claim 19, wherein the leads are contoured to extend away from the bottom surface of the semiconductor package..Iaddend..Iadd.21. The semiconductor package of claim 19, wherein the leads are elongated and contoured to extend away from the bottom surface of the semiconductor package..Iaddend..Iadd.22. The semiconductor package of claim 19, wherein the semiconductor chip has a length, wherein the leads extend along the length of the semiconductor
chip..Iaddend..Iadd.3. The semiconductor package of claim 19, wherein the semiconductor device comprises a memory device..Iaddend..Iadd.24. The semiconductor package of claim 19, wherein the semiconductor chip has a major surface on which are formed circuit elements, wherein the leads are attached to the major surface by an insulating adhesive..Iaddend..Iadd.25. The semiconductor package of claim 24, wherein the leads are attached at a central portion of the major surface..Iaddend..Iadd.26. The semiconductor package of claim 24, wherein the insulating adhesive comprises an insulating film..Iaddend..Iadd.27. The semiconductor package of claim 24, wherein the insulating adhesive comprises an insulating paste..Iaddend..Iadd.28. The semiconductor package of claim 19, wherein at least one of the leads comprises a power supply bus bar..Iaddend..Iadd.29. The semiconductor package of claim 28, wherein the power supply bus bar is attached to a central portion of the semiconductor chip..Iaddend..Iadd.30. The semiconductor package of claim 19, wherein the connectors comprise bonding wires..Iaddend..Iadd.31. The semiconductor package of claim 19, wherein the electrical connection points provide electrical connections for connecting the semiconductor package to a printed circuit board..Iaddend..Iadd.32. The semiconductor package of claim 19, wherein the exposed second portions of the leads do not extend beyond the bottom surface of the semiconductor package..Iaddend..Iadd.33. A semiconductor package, comprising: a semiconductor chip, wherein the semiconductor chip comprises a length; a plurality of contoured leads attached to the semiconductor chip with an insulator and having at least a first portion and a second portion, wherein the leads extend along the length of the semiconductor chip, and wherein the leads do not extend beyond the length of the semiconductor chip; connectors electrically connecting the chip to the first portion of the leads; a molding compound formed completely around the chip and also formed around the connectors and at least the first portion of the leads, wherein the second portion of the leads is exposed to provide electrical connection points, wherein the exposed second portion of the leads is flush with a
surface of the semiconductor package..Iaddend..Iadd.34. The semiconductor package of claim 33, wherein the semiconductor device comprises a memory device..Iaddend..Iadd.35. The semiconductor package of claim 33, wherein the semiconductor chip has a major surface on which are formed circuit elements, wherein the leads are attached to the major surface by an insulating adhesive..Iaddend..Iadd.36. The semiconductor package of claim 35, wherein the leads are attached at a central portion of the major surface..Iaddend..Iadd.37. The semiconductor package of claim 35, wherein the insulating adhesive comprises an insulating film..Iaddend..Iadd.38. The semiconductor package of claim 35, wherein the insulating adhesive comprises an insulating paste..Iaddend..Iadd.39. The semiconductor package of claim 33, wherein at least one of the leads comprises a power supply bus bar..Iaddend..Iadd.40. The semiconductor package of claim 39, wherein the power supply bus bar is attached to a central portion of the semiconductor chip..Iaddend..Iadd.41. The semiconductor package of claim 33, wherein the connectors comprise bonding wires..Iaddend..Iadd.42. The semiconductor package of claim 33, wherein the electrical connection points provide electrical connections for connecting the semiconductor package to a printed circuit board..Iaddend..Iadd.43. The semiconductor package of claim 33, wherein the exposed second portions of the leads are positioned on a bottom surface of the semiconductor package, wherein the exposed second portions of the leads do not extend beyond the bottom surface of the semiconductor package..Iaddend..Iadd.44. A semiconductor package, comprising: a semiconductor chip, wherein the semiconductor chip has a major surface on which are formed circuit elements; a plurality of contoured leads attached to the semiconductor chip with an insulator and having at least a first portion and a second portion, wherein the leads are attached to the major surface by an insulating adhesive; connectors electrically connecting the chip to the first portion of the leads; a molding compound formed completely around the chip and also formed around the connectors and at least the first portion of the leads, wherein the second portion of the leads is exposed to provide electrical connection points, wherein the exposed second portion of the leads is flush with a
surface of the semiconductor package..Iaddend..Iadd.45. The semiconductor package of claim 44, wherein the semiconductor chip has a length, wherein the leads extend along the length of the semiconductor chip..Iaddend..Iadd.46. The semiconductor package of claim 44, wherein the semiconductor device comprises a memory device..Iaddend..Iadd.47. The semiconductor package of claim 44, wherein the leads are attached at a central portion of the major surface..Iaddend..Iadd.48. The semiconductor package of claim 44, wherein the insulating adhesive comprises an insulating film..Iaddend..Iadd.49. The semiconductor package of claim 44, wherein the insulating adhesive comprises an insulating paste..Iaddend..Iadd.50. The semiconductor package of claim 44, wherein at least one of the leads comprises a power supply bus bar..Iaddend..Iadd.51. The semiconductor package of claim 50, wherein the power supply bus bar is attached to a central portion of the semiconductor chip..Iaddend..Iadd.52. The semiconductor package of claim 44, wherein the connectors comprise bonding wires..Iaddend..Iadd.53. The semiconductor package of claim 44, wherein the electrical connection points provide electrical connections for connecting the semiconductor package to a printed circuit board..Iaddend..Iadd.54. The semiconductor package of claim 44, wherein the exposed second portions of the leads are positioned on a bottom surface of the semiconductor package, wherein the exposed second portions of the leads do not extend beyond the bottom surface of the semiconductor
package..Iaddend..Iadd.55. A semiconductor package, comprising: a semiconductor chip; a plurality of contoured leads attached to the semiconductor chip with an insulator and having at least a first portion and a second portion, wherein at least one of the leads comprises a power supply bus bar; connectors electrically connecting the chip to the first portion of the leads; a molding compound formed completely around the chip and also formed around the connectors and at least the first portion of the leads, wherein the second portion of the leads is exposed to provide electrical connection points, wherein the exposed second portion of the leads is flush with a surface of the semiconductor package..Iaddend..Iadd.56. The semiconductor package of claim 55, wherein the semiconductor device comprises a memory device..Iaddend..Iadd.57. The semiconductor package of claim 55, wherein the semiconductor chip has a major surface on which are formed circuit elements, wherein the leads are attached to the major surface by an insulating adhesive..Iaddend..Iadd.58. The semiconductor package of claim 57, wherein the leads are attached at a central portion of the major surface..Iaddend..Iadd.59. The semiconductor package of claim 57, wherein the insulating adhesive comprises an insulating film..Iaddend..Iadd.60. The semiconductor package of claim 57, wherein the insulating adhesive comprises an insulating paste..Iaddend..Iadd.61. The semiconductor package of claim 55, wherein the power supply bus bar is attached to a central portion of the semiconductor chip..Iaddend..Iadd.62. The semiconductor package of claim 55, wherein the connectors comprise bonding wires..Iaddend..Iadd.63. The semiconductor package of claim 55, wherein the electrical connection points provide electrical connections for connecting the semiconductor package to a printed circuit board..Iaddend..Iadd.64. The semiconductor package of claim 55, wherein the exposed second portions of the leads are positioned on a bottom surface of the semiconductor package, wherein the exposed second portions of the leads do not extend beyond the bottom surface of the semiconductor package..Iaddend.Cited by (0)
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