P
USRE36396EExpiredUtilityPatentIndex 70

Electrical substrate material comprising amorphous fused silica powder

Assignee: ROGERS CORPPriority: Feb 17, 1987Filed: Jan 27, 1995Granted: Nov 16, 1999
Est. expiryFeb 17, 2007(expired)· nominal 20-yr term from priority
Inventors:ARTHUR DAVID JMOSKO JOHN CJACKSON CONNIE STRAUT G ROBERT
H10W 70/695H05K 1/0366H05K 2201/0209H05K 2201/0251H05K 2201/0239Y10T428/259H05K 2201/0195Y10T428/2995Y10T428/252H05K 3/4626H05K 1/034Y10T428/31544H05K 2201/068H01B 3/445H05K 1/0373Y10T428/31692H05K 2201/015Y10T428/3154
70
PatentIndex Score
16
Cited by
29
References
6
Claims

Abstract

A ceramic filled fluoropolymer-based electrical substrate material well suited for forming rigid printed wiring board substrate materials and integrated circuit chip carriers is presented which exhibits improved electrical performance over other printed wiring board materials and circuit chip carriers. Also, the low coefficients of thermal expansion and compliant nature of this electrical substrate material results in improved surface mount reliability and plated through-hole reliability. The electrical substrate material preferably comprises polytetrafluoroethylene filled with silica along with a small amount of microfiberglass. In an important feature of this invention, the ceramic filler (silica) is coated with a silane coating material which renders the surface of the ceramic hydrophobic and provides improved tensile strength, peel strength and dimensional stability.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
       1. An electrical substrate material comprising: fluoropolymeric material;   ceramic filler material, said filler material being in an amount of at least about 55 weight percent of the total substrate material.Iadd., said ceramic filler comprising silica, said silica comprising amorphous fused silica powder.Iaddend.;   said ceramic filler being coated with a silane coating;   at least one layer of metal being disposed on at least a portion of said electrical substrate material.   
     
     
       2. The material of claim 1 including: fiber reinforcement material.   
     
     
       3. The material of claim 2 wherein: said fiber reinforcement material has a weight percent of equal to or less than 2%.   
     
     
       4. The material of claim 2 wherein: said fiber reinforcement material is glass fiber.   
     
     
       5. The material of claim 4 wherein: said glass fiber Is microglass fiber.   
     
     
       6. The material of claim 1 wherein said fluoropolymeric material is selected from the group .[.comprising.]. .Iadd.consisting .Iaddend.of: polytetrafluoroethylene, hexa fluoropropene, tetrafluoroethylene .[.or.]. .Iadd.and .Iaddend.perfluoro alkyl vinyl ether. .[.7. The material of claim 1 wherein said ceramic filler comprises silica..]..[.8. The material of claim 7 wherein said silica comprises amorphous fused silica   
     
     
        powder..]. . The material of claim 1 wherein said silane coating is selected from the group .[.comprising.]. .Iadd.consisting of.Iaddend.: p-chloromethyl phenyl trimethoxy silane, amino ethyl amino trimethoxy silane, .Iadd.and .Iaddend.a mixture of phenyl trimethoxy silane and amino   
     
     
        ethyl amino propyl trimethoxy silane. 10. The material of claim 1 wherein: said silane coating is in an amount of at least 1 weight percent relative   
     
     
        to the weight of the ceramic filler. 11. The material of claim 1 wherein said ceramic filler comprises particles and wherein the mean particle size 
     
     
        varies from about 10 to 15 μm. 12. In a multilayer circuit including at least a first circuit layer and a second circuit layer, the improvement comprising: an adhesive layer sandwiched between the first and second circuit layers, said adhesive layer comprising:   fluoropolymeric material;   ceramic filler material, said filler material being in an amount of at least about 55 weight percent of the total adhesive layer.Iadd., said ceramic filler comprising silica, said silica comprising amorphous fused silica powder.Iaddend.; and   
     
     
       said ceramic filler being coated with a silane coating. 13. The multilayer circuit of claim 12 including: 
     
     
       at least one plated through hole. 14. The multilayer circuit of claim 12 including: 
     
     
       fiber reinforcement material. 15. The multilayer circuit of claim 14 wherein: said fiber reinforcement material has a weight percent of equal to or less   
     
     
        than 2%. 16. The multilayer circuit of claim 14 wherein: 
     
     
       said fiber reinforcement material is glass fiber. 17. The multilayer circuit of claim 16 wherein: 
     
     
       said glass fiber is microglass fiber. 18. The multilayer circuit of claim 12 wherein said fluoropolymeric material is selected from the group .[.comprising.]. .Iadd.consisting of.Iaddend.: polytetrafluoroethylene, hexa fluoropropene, tetrafluoroethylene .[.or.]. .Iadd.and .Iaddend.perfluoro alkyl vinyl ether. .[.19. The multilayer circuit of claim 12 wherein said ceramic filler comprises silica..]..[.20. The multilayer circuit of claim 19 wherein said silica comprises amorphous   
     
     
        fused silica powder..].21. The multilayer circuit of claim 12 wherein said silane coating is selected from the group .[.comprising.]. .Iadd.consisting of.Iaddend.: p-chloromethyl phenyl trimethoxy silane, amino ethyl amino trimethoxy silane, .Iadd.and .Iaddend.a mixture of phenyl trimethoxy silane and amino   
     
     
        ethyl amino propyl trimethoxy silane. 22. The multilayer circuit of claim 12 wherein: said silane coating is in an amount of at least 1 weight percent relative   
     
     
        to the weight of the ceramic filler. 23. The multilayer circuit of claim 12 wherein said ceramic filler comprises particles and wherein the mean 
     
     
        particle size varies from about 10 to 15 μm. 24. An electrical substrate material comprising: night mom fluoropolymeric material;   ceramic filler material, said filler material being in an amount of at least about 50 volume percent of the total substrate material.Iadd., said ceramic filler comprising silica, said silica comprising amorphous fused silica powder.Iaddend.;   said ceramic filler being coated by a silane coating; and   at least one layer of metal being disposed on at least a portion of said   
     
     
        electrical substrate material. 25. The material of claim 24 including: 
     
     
       fiber reinforcement material. 26. The material of claim 25 wherein: 
     
     
       said fiber reinforcement material is glass fiber. 27. The material of claim 26 wherein: 
     
     
       said glass fiber is microglass fiber. 28. The material of claim 24 wherein said fluoropolymeric material is selected from the group .[.comprising.]. .Iadd.consisting of.Iaddend.: polytetrafluoroethylene, hexa fluoropropene, tetrafluoroethylene .[.or.]. .Iadd.and .Iaddend.perfluoro allyl vinyl ether. .[.29. The material of claim 28 wherein said ceramic filler comprises silica..]..[.30. The material of claim 29 wherein said silica comprises amorphous fused silica   
     
     
        powder..].31. The material of claim 24 wherein said silane coating is selected from the group .[.comprising.]. .Iadd.consisting of.Iaddend.: p-chloromethyl phenyl trimethoxy silane, amino ethyl amino trimethoxy silane, .Iadd.and .Iaddend.a mixture of phenyl trimethoxy silane and amino   
     
     
        ethyl amino propyl trimethoxy silane. 32. The material of claim 24 wherein said ceramic filler comprises particles and wherein the mean particle size 
     
     
        varies from about 10 to 15 μm. 33. In a multilayer circuit including at least a first circuit layer and a second circuit layer, the improvement comprising: an adhesive layer sandwiched between the first and second circuit layers, said adhesive layer comprising:   fluoropolymeric material;   ceramic filler material, said filler material being in an amount of at least about 50 volume percent of the total adhesive layer.Iadd., said ceramic filler comprising silica said silica comprising amorphous fused silica powder.Iaddend.; and   
     
     
       said ceramic filler being coated with a silane coating. 34. The multilayer circuit of claim 33 including: 
     
     
       at least one plated through hole. 35. The multiplayer circuit of claim 33 including: 
     
     
       fiber reinforcement material. 36. The multilayer circuit of claim 35 wherein: 
     
     
       said fiber reinforcement material is glass fiber. 37. The multilayer circuit of claim 36 wherein: 
     
     
       said glass fiber is microglass fiber. 38. The multilayer circuit of claim 33 wherein said fluoropolymeric material is selected from the group .[.comprising.]. .Iadd.consisting of.Iaddend.: polytetrafluoroethylene, hexa fluoropropene, tetrafluoroethylene .[.or.]. .Iadd.and .Iaddend.perfluoro allyl vinyl ether. .[.39. The multilayer circuit of claim 33 wherein said ceramic filler comprises silica..]..[.40. The multilayer circuit of claim 39 wherein said silica comprises amorphous   
     
     
        fused silica powder..].41. The multilayer circuit of claim 33 wherein said silane coating is selected from the group .[.comprising.]. .Iadd.consisting of.Iaddend.: p-chloromethyl phenyl trimethoxy silane, amino ethyl amino trimethoxy silane, .Iadd.and .Iaddend.a mixture of phenyl trimethoxy silane and amino   
     
     
        ethyl amino propyl trimethoxy silane. 42. The multilayer circuit of claim 33 wherein said ceramic filler comprises particles and wherein the mean particle size varies from about 10 to 15 μm. .Iadd.43. An electrical substrate material comprising: fluoropolymeric material;   ceramic filler material, said filler material being in an amount of at least about 55 weight percent of the total substrate material, said ceramic comprising silica, said silica comprising amorphous fused silica powder;   said ceramic filler being coated with a silane coating;   at least one layer of metal being disposed on at least a portion of said electrical substrate material; and   said electrical substrate material having a dielectric constant of between   
     
     
        about 2.7 to 2.9. .Iaddend..Iadd.44.  The material of claim 43 including: said substrate material having a dissipation factor in the range of about 0.0008 to 0.002 at 10 GHz. .Iaddend..Iadd.45. The material of claim 44 wherein:   said dissipation factor is equal to or less than about 0.0017 at 10 GHz. .Iaddend..Iadd.46. The material of claim 43 wherein said substrate material has an X, Y and Z axis and including:   a coefficient of thermal expansion (CTE) in the X-Y plane in the range of about 10 to about 22 ppm/°C. .Iaddend..Iadd.47. The material of claim 46 wherein:   said CTE in the X-Y plane is in the range of about 16 to about 19   
     
     
        ppm/°C. .Iaddend..Iadd.48.  The material of claim 43 wherein said substrate material has an X, Y and Z axis and including: a coefficient of thermal expansion (CTE) in the Z axis in the range of about 15 to about 35 ppm/°C. .Iaddend..Iadd.49. The material of claim 48 wherein:   said CTE in the Z axis is about 24 ppm/°C. .Iaddend..Iadd.50. An electrical substrate material comprising:   fluoropolymeric material;   ceramic filler material, said filler material being in an amount of at least about 55 weight percent of the total substrate material, said ceramic filler comprising silica, said silica comprising amorphous fused silica powder;   said ceramic filler being coated with a silane coating;   at least one layer of metal being disposed on at least a portion of said electrical substrate material; and   said electrical substrate material having a dissipation factor in the range of equal to or less than about 0.0017 at 10 GHz. .Iaddend..Iadd.51. The material of claim 50 wherein said substrate material has an X, Y and Z axis and including:   a coefficient of thermal expansion (CTE) in the X-Y plane in the range of about 10 to about 22 ppm/°C. .Iaddend..Iadd.52. The material of claim 51 wherein:   said CTE in the X-Y plane is in the range of about 16 to about 19   
     
     
        ppm/°C. .Iaddend..Iadd.53.  The material of claim 50 wherein said substrate material has an X, Y and Z axis and including: a coefficient of thermal expansion (CTE) in the Z axis in the range of about 15 to about 35 ppm/°C. .Iaddend..Iadd.54. The material of claim 53 wherein:   said CTE in the Z axis is about 24 ppm/°C. .Iaddend..Iadd.55. An electrical substrate material comprising:   fluoropolymeric material;   seismic filler material, said filler material being in an amount of at least about 55 weight percent of the total substrate material, said ceramic filler comprising silica, said silica comprising amorphous fused silica powder;   said ceramic filler being coated with a silane coating;   at least one layer of metal being disposed on at least a portion of said electrical substrate material; and   said electrical substrate material having a X, Y and Z axis and having a coefficient of thermal expansion in the Z-axis of about 15 to about 35 ppm/°C. .Iaddend..Iadd.56. The material of claim 55 including:   said substrate material having a dissipation factor in the range of about 0.0008 to 0.002 at 10 GHz. .Iaddend..Iadd.57. The material of claim 55 wherein:   
     
     
       said CTE in the Z axis is about 24 ppm/°C. .Iaddend..Iadd.58.  An electrical substrate material comprising: fluoropolymeric material;   ceramic filler material, said filler material being in an amount of at least about 55 weight percent of the total substrate material, said ceramic filler comprising silica, said silica comprising amorphous fused silica powder;   said ceramic filler being coated with a silane coating;   at least one layer of copper disposed on at least a portion of said electrical substrate material; and   said electrical substrate material having a X, Y and Z axis and having a coefficient of thermal expansion (CTE) in the X-Y plane in the range of about 10 to about 22 ppm/°C. .Iaddend..Iadd.59. The material of claim 58 including:   said substrate material having a dissipation factor in the range of about 0.0008 to 0.002 at 10 GHz. .Iaddend..Iadd.60. The material of claim 58 wherein:   said CTE in the X-Y plane is in the range of about 16 to about 19   
     
     
        ppm/°C. .Iaddend..Iadd.61.  An electrical material comprising: fluoropolymeric material;   ceramic filler material, said filler material being in an amount of at least about 55 weight percent of the total substrate material, said ceramic filler comprising silica, said silica comprising amorphous fused silica powder;   said ceramic filler being coated with a silane coating;   at least one layer of metal being disposed on at least a portion of said electrical substrate material; and   said electrical substrate material having a X, Y and Z axis and including a coefficient of thermal expansion (CTE) in the X-Y plane in the range of about 10 to 22 ppm/°C. and a CTE in the Z axis in the range of about 15 to about 35 ppm/°C. .Iaddend..Iadd.62. The material of claim 61 including:   said substrate material having a dissipation factor in the range of about 0.0008 to 0.002 at 10 GHz. .Iaddend..Iadd.63. The material of claim 62 wherein:   said dissipation factor is equal to or less than about 0.0017 at 10 GHz. .Iaddend..Iadd.64. The material of claim 61 wherein:   said CTE in the X-Y plane is in the range of about 16 to about 19 ppm/°C. .Iaddend..Iadd.65. The material of claim 64 wherein:   said CTE in the Z axis is about 24 ppm/°C. .Iaddend..Iadd.66. The material of claim 61 wherein:   
     
     
       said CTE in the Z axis is about 24 ppm/°C. .Iaddend..Iadd.67.  The material of claim 61 including: a dielectric constant in the range of about 2.7 to about 2.9. .Iaddend..Iadd.68. The material of claim 67 including:   said substrate material having a dissipation factor in the range of about 0.0008 to 0.002 at 10 GHz. .Iaddend..Iadd.69. The material of claim 68 wherein:   said dissipation factor is equal to or less than about 0.0017 at 10 GHz. .Iaddend..Iadd.70. The material of claim 67 wherein:   said CTE in the X-Y plane is in the range of about 16 to about 19 ppm/°C. .Iaddend..Iadd.71. The material of claim 70 wherein:   said CTE in the Z axis is in the range of about 24 ppm/°C. .Iaddend..Iadd.72. The material of claim 67 wherein:   said CTE in the Z axis is in the range of about 24 ppm/°C.   
     
     
        .Iaddend..Iadd.73.  An electrical substrate material comprising: fluoropolymeric material;   ceramic filler material, said filler material being in an amount of at least about 50 volume percent of the total substrate material, said ceramic filler comprising silica, said silica comprising amorphous fused silica powder;   said ceramic filler being coated with a silane coating;   at least one layer of metal being disposed on at least a portion of said electrical substrate material; and   said electrical substrate material having a dielectric constant of between about 2.7 to 2.9. .Iaddend..Iadd.74. The material of claim 73 including:   said substrate material having a dissipation factor in the range of about 0.0008 to 0.002 at 10 GHz. .Iaddend..Iadd.75. The material of claim 74 wherein:   said dissipation factor is equal to or less than about 0.0017 at 10 GHz. .Iaddend..Iadd.76. The material of claim 73 wherein said substrate material has an X, Y and Z axis and including:   a coefficient of thermal expansion (CTE) in the X-Y plane in the range of about 10 to about 22 ppm/°C. .Iaddend..Iadd.77. The material of claim 76 wherein:   said CTE in the X-Y plane is in the range of about 16 to about 19   
     
     
        ppm/°C. .Iaddend..Iadd.78.  The material of claim 73 wherein said substrate material has an X, Y and Z axis and including: a coefficient of thermal expansion (CTE) in the Z axis in the range of about 15 to about 35 ppm/°C. .Iaddend..Iadd.79. The material of claim 78 wherein:   said CTE in the Z axis is about 24 ppm/°C. .Iaddend..Iadd.80. An electrical substrate material comprising:   fluoropolymeric material;   ceramic filler material, said filler material being in an amount of at least about 50 volume percent of the total substrate material, said ceramic filler comprising silica, said silica comprising amorphous fused silica powder;   said ceramic filler being coated with a silane coating;   at least one layer of metal being disposed on at least a portion of said electrical substrate material; and   said electrical substrate material having a dissipation factor in the range of equal to or less than about 0.0017 at 10 GHz. .Iaddend..Iadd.81. The material of claim 80 wherein said substrate material has an X, Y and Z axis and including:   a coefficient of thermal expansion (CTE) in the X-Y plane in the range of about 10 to about 22 ppm/°C. .Iaddend..Iadd.82. The material of claim 81 wherein:   said CTE in the X-Y plane is in the range of about 16 to about 19   
     
     
        ppm/°C. .Iaddend..Iadd.83.  The material of claim 80 wherein said substrate material has an X, Y and Z axis and including: a coefficient of thermal expansion (CTE) in the Z axis in the range of about 15 to about 35 ppm/°C. .Iaddend..Iadd.84. The material of claim 83 wherein:   said CTE in the Z axis is about 24 ppm/°C. .Iaddend..Iadd.85. An electrical substrate material comprising:   fluoropolymeric material;   ceramic filler material, said filler material being in an amount of at least about 50 volume percent of the total substrate material, said ceramic filler comprising silica, said silica comprising amorphous fused silica powder;   said ceramic filler being coated with a silane coating;   at least one layer of metal being disposed on at least a portion of said electrical substrate material; and   said electrical substrate material having a X, Y and Z axis and having a coefficient of thermal expansion in the Z-axis of about 15 to about 35 ppm/°C. .Iaddend..Iadd.86. The material of claim 85 including:   said substrate material having a dissipation factor in the range of about 0.0008 to 0.002 at 10 GHz. .Iaddend..Iadd.87. The material of claim 85 wherein:   
     
     
       said CTE in the Z axis is about 24 ppm/°C. .Iaddend..Iadd.88.  An electrical substrate material comprising: fluoropolymeric material;   ceramic filler material, said filler material being in an amount of at least about 50 volume percent of the total substrate material, said ceramic filler comprising silica, said silica comprising amorphous fused silica powder;   said ceramic filler being coated with a silane coating;   at least one layer of copper disposed on at least a portion of said electrical substrate material; and   said electrical substrate material having a X, Y and Z axis and having a coefficient of thermal expansion (CTE) in the X-Y plane in the range of about 10 to about 22 ppm/°C. .Iaddend..Iadd.89. The material of claim 88 including:   said substrate material having a dissipation factor in the range of about 0.0008 to 0.002 at 10 GHz. .Iaddend..Iadd.90. The material of claim 88 wherein:   said CTE in the X-Y plane is in the range of about 16 to about 19   
     
     
        ppm/°C. .Iaddend..Iadd.91.  An electrical substrate material comprising: fluoropolymeric material;   ceramic filler material, said filler material being in an amount of at least about 50 volume percent of the total substrate material, said ceramic filler comprising silica, said silica comprising amorphous fused silica powder;   said ceramic filler being coated with a silane coating;   at least one layer of metal being disposed on at least a portion of said electrical substrate material; and   said electrical substrate material having a X, Y and Z axis and including a coefficient of thermal expansion (CTE) in the X-Y plane in the range of about 10 to 22 ppm/°C. and a CTE in the Z axis in the range of about 15 to about 35 ppm/°C. .Iaddend..Iadd.92. The material of claim 91 including:   said substrate material having a dissipation factor in the ranges of about 0.0008 to 0.002 at 10 GHz. .Iaddend..Iadd.93. The material of claim 92 wherein:   said dissipation factor is equal to or less than about 0.0017 at 10 GHz. .Iaddend..Iadd.94. The material of claim 91 wherein:   said CTE in the X-Y plane is in the range of about 16 to about 19 ppm/°C. .Iaddend..Iadd.95. The material of claim 94 wherein:   said CTE in the Z axis is about 24 ppm/°C. .Iaddend..Iadd.96. The material of claim 91 wherein:   
     
     
       said CTE in the Z axis is about 24 ppm/°C. .Iaddend..Iadd.97.  The material of claim 91 including: a dielectric constant in the range of about 2.7 to about 2.9. .Iaddend..Iadd.98. The material of claim 97 including:   said substrate material having a dissipation factor in the range of about 0.0008 to 0.002 at 10 GHz. .Iaddend..Iadd.99. The material of claim 98 wherein:   said dissipation factor is equal to or less than about 0.0017 at 10 GHz. .Iaddend..Iadd.100. The material of claim 97 wherein:   said CTE in the X-Y plane is in the range of about 16 to about 19 ppm/°C. .Iaddend..Iadd.101. The material of claim 100 wherein:   said CTE in the Z axis is in the range of about 24 ppm/°C. .Iaddend..Iadd.102. The material of claim 97 wherein:   said CTE in the Z axis is in the range of about 24 ppm/°C. .Iaddend.

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