USRE36480EExpiredUtility

Control and monitoring device for a power switch

30
Assignee: ST MICROELECTRONICS SAPriority: Jan 9, 1990Filed: Sep 20, 1996Granted: Jan 4, 2000
Est. expiryJan 9, 2010(expired)· nominal 20-yr term from priority
H03K 17/063
30
PatentIndex Score
2
Cited by
11
References
10
Claims

Abstract

A control and monitoring circuit for a power switch comprises a first portion (20) connected to this switch and fed with reference to a floating voltage (V F ) of an electrode of this switch, a second portion (10) connected to circuits external to the switch and fed with reference to a fixed voltage, a coder (40) arranged on the side of the second portion and a suitable decoder (50) arranged on the side of the first portion.

Claims

exact text as granted — not AI-modified
I claim: 
     
       1. A control and monitoring circuit for a power switch comprising: a first control circuit connected to said power switch and adapted to receive a floating voltage of an electrode of said power switch;   a second control circuit connected to circuits external to said power switch and adapted to receive a fixed voltage;   a coder circuit connected to said second control circuit; and   a decoding circuit connected to said first control circuit; wherein   said coder circuit is connected to said decoder circuit by first and second paths; and   said coder circuit comprises   (a) means for sending a plurality of signals on one of said first and second paths, and   (b) means for sending one signal on the other of said first and second paths, wherein at least one signal of said plurality of signals is simultaneous with said one signal.   
     
     
       2. The control and monitoring circuit according to claim 1, wherein said plurality of signals and said one signal are pulses;   said coder circuit includes means to control sending pulses on said first and second paths in response to input control signals; and   said decoder circuit includes means for generating control signals in response to said pulses on said first and second paths, said control signals being input to said first control circuit on said first and second paths.   
     
     
       3. The control and monitoring circuit according to claim 2, wherein said first control circuit comprises a flip-flop;   one of said first and second paths is connected to a set input of said flip-flop; and   the other one of said first and second paths is connected to a reset input of said flip-flop.   
     
     
       4. A control and monitoring circuit for a power switch comprising: a first control circuit connected to said power switch and adapted to receive a floating voltage of an electrode of said power switch;   a second control circuit connected to circuits external to said power switch and adapted to receive a fixed voltage;   a coder circuit connected to said second control circuit; and   a decoding circuit connected to said first control circuit, wherein   said coder circuit and said decoder circuit are interconnected by first and second paths, signals on one of said first and second paths controlling said power switch to turn on and signals on the other one of said first and second paths controlling said power switch to turn off.   
     
     
       5. The control and monitoring circuit according to claim 4, wherein said signals are pulses; said coder circuit includes means to generate .Iadd.said .Iaddend.pulses for said first and second paths in response to an input control signal; and   said decoder circuit includes means for generating control signals in response to said pulses on said first and second paths, said control signals being input to said first control circuit on said first and second paths.   
     
     
       6. The control and monitoring circuit according to claim 4, wherein said first control circuit comprises a flip-flop;   one of said first and second paths is connected to a set input of said flip-flop; and   the other one of said first and second paths is connected to a reset input of said flip-flop.   
     
     
       7. In a device comprising a power switch, a first control circuit adapted to receive a floating voltage of an electrode of said power switch, a decoder circuit, a coder circuit and a second control circuit adapted to receive a fixed voltage, said second control circuit receiving an external control signal to control the on/off function of said power switch and connected to said coder circuit, said coder circuit connected to said decoder circuit by first and second paths, and said decoder circuit connected to said first control circuit and outputting control signals to said first control circuit, a method of controlling said power switch comprising: generating pulses for said first and second paths in response to said external control signal,   sending a plurality of said pulses on one of said first and second paths; and   sending one pulse on the other of said first and second paths, said one pulse being simultaneous with at least one pulse of said plurality of said pulses.   
     
     
       8. The method according to claim 7, wherein the step of sending said plurality of pulses on one of said first and second paths control said power switch to turn on; and   the step of sending one pulse on said other of said first and second paths controls said power switch to turn off. .Iadd.   
     
     
       9.  A circuit comprising: a first control circuit having an output terminal to provide an output voltage adapted to change from a low state to a high state, the first control circuit also having a first voltage supply terminal adapted to be connected to a first reference voltage potential;   a second control circuit having an input terminal, and having a ground terminal adapted to be connected to a second fixed reference voltage potential which is a different value than the first reference voltage potential;   a coder circuit connected to said second control circuit;   a decoder circuit connected to said first control circuit; and   first and second electrical paths interconnecting the coder circuit and the decoder circuit, a signal on the first path controlling the output terminal of the first control circuit to output a high voltage potential and a signal on the second path controlling the output terminal to output a lower voltage potential. .Iaddend..Iadd.   
     
     
       10.  The circuit according to claim 9, further including: a ground terminal on the decoder circuit;   an electrical connection from the first voltage supply terminal of the first control circuit to the ground terminal of the decoder circuit. .Iaddend..Iadd.11. The circuit according to claim 9, further including a power switch connected to the output of the first control circuit such that a signal on the first path controls the power switch to turn on and a signal on the second path controls the power switch to turn off. .Iaddend..Iadd.12. The circuit according to claim 11 wherein the first reference voltage is a floating voltage adapted to be received as an input from an electrode of the power switch. .Iaddend..Iadd.13. The circuit according to claim 9 wherein the first voltage supply terminal is a around voltage terminal. .Iaddend..Iadd.14. The circuit according to claim 13 wherein the first reference voltage is a floating voltage. .Iaddend..Iadd.15. The circuit according to claim 9, further including a second voltage supply terminal as a part of the first control circuit.   
     
     
        .Iaddend..Iadd.16.  A method for controlling a signal level, comprising: receiving a first transition edge of a control signal;   coding said first transition edge as both a first plurality of pulses and as a first pulse that is separate from said plurality of pulses and that substantially coincides in time with one of said plurality of pulses;   providing said plurality of pulses on a first path;   providing said pulse on a second path;   decoding said plurality of pulses on said first path and said pulse on said second path to obtain a decoded control signal; and   generating in response to said decoded control signal said signal level having a first value. .Iaddend..Iadd.17. The method of claim 16, further comprising:   receiving a second transition edge of said control signal;   coding said second transition edge as a second plurality of pulses and a second pulse;   providing said second plurality of pulses on said second path;   providing said second pulse on said first path;   decoding said second plurality of pulses on said second path and said second pulse on said first path to obtain said decoded control signal; and   generating in response to said decoded control signal said signal level having a second value. .Iaddend..Iadd.18. The method of claim 20 wherein:   said first transition edge of said control signal transitions from a first state to a second state; and   said second transition edge of said control signal transitions from said second state to said first state. .Iaddend..Iadd.19. The method of claim 18 wherein said first state equals a first high logic level and wherein said first value equals a second high logic level. .Iaddend..Iadd.20. The method of claim 18 wherein said first state equals a first low logic level and wherein said first value equals a second low logic level. .Iaddend..Iadd.21. A method for controlling a power switch, comprising:   receiving a first transition edge of a control signal;   coding said first transition edge as both a first plurality of signals and as a first signal that is generated substantially simultaneously with one of said plurality of signals;   providing said plurality of signals on one of first and second signal paths;   providing said signal on the other of said first and second signal paths;   decoding said plurality of signals from said first signal path and said signal from said second signal path to obtain a decoded control signal;   generating in response to said decoded control signal a switching signal; and   providing said switching signal to a control terminal of said power switch. .Iaddend..Iadd.22. The method of claim 21, further comprising referencing said switching signal to a voltage that is coupled to a terminal of said   
     
     
        power switch other than said control terminal. .Iaddend..Iadd.23.  A circuit comprising: a first control circuit having an output terminal that provides a control signal having first and second states, the first control circuit also having a first voltage supply terminal that is coupled to receive a first reference voltage potential;   a second control circuit having an input terminal, and having a ground terminal coupled to receive a second fixed reference voltage potential that is a different value than the first reference voltage potential;   a coder circuit coupled to said second control circuit;   a signal-level translator coupled to said coder circuit;   a decoder circuit coupled to said signal-level translator; and   first and second electrical paths intercoupling the coder circuit, the signal-level translator, and the decoder circuit, a first combination of signals on the first and second paths causing the first control circuit to generate the control signal having the first state, and a second combination of signals on the first and second paths causing the first control circuit to generate the control signal having the second state. .Iaddend..Iadd.24. The circuit of claim 23 wherein the decoder circuit includes a ground terminal that is coupled to the first reference voltage potential. .Iaddend..Iadd.25. The circuit according to claim 23, further comprising a power switch having a control terminal coupled to the output terminal of the first control circuit such that one of the first and second combinations of signals on the first and second paths controls the power switch to turn on, and the other of the first and second combinations of signals controls the power switch to turn off. .Iaddend..Iadd.26. The circuit according to claim 25 wherein the first reference voltage potential is a floating voltage that is coupled to a drive electrode of the power switch. .Iaddend..Iadd.27. The circuit according to claim 23 wherein the first voltage supply terminal of the first control circuit is a ground terminal. .Iaddend..Iadd.28. The circuit of claim 27 wherein the first reference voltage potential is a floating voltage. .Iaddend..Iadd.29. The circuit of claim 23 wherein the first control circuit comprises a second voltage supply terminal. .Iaddend.

Cited by (0)

No later patents cite this yet.

References (0)

No backward citations on record.