USRE37738EExpiredUtility
Simple and efficient switching regulator for fast transient loads such as microprocessors
Priority: Oct 9, 1996Filed: Jun 28, 2000Granted: Jun 11, 2002
Est. expiryOct 9, 2016(expired)· nominal 20-yr term from priority
Inventors:Milivoje Slobodan Brkovic
G05F 1/575H02M 3/156H02M 1/0009
80
PatentIndex Score
23
Cited by
9
References
50
Claims
Abstract
A buck switching DC-to-DC regulator having a resistor and capacitor in combination across the storage inductor to measure output current and voltage. The resistor connects to the input of the inductor and the capacitor to the output of the inductor. The junction of the resistor and capacitor connects to an error amplifier for controlling the switching regulator. The regulator may be paralleled for more output current by connecting the outputs together and providing a common reference voltage to all the regulators.
Claims
exact text as granted — not AI-modifiedI claim:
1. In a computing system, a switching regulator for powering a load including a microprocessor, the switching regulator having a switch, an inductor and a filter capacitor coupled in series at junctions, and an error amplifier having an input for controlling the switch, CHARACTERIZED BY:
a first resistor coupled to the junction between the switch and the inductor;
a capacitor connected to the first resistor at a node and to the junction between the inductor and the filter capacitor;
wherein the node is coupled to the error amplifier input.
2. The computing system switching regulator as recited in claim 1 , further characterized by a second resistor disposed in parallel with the capacitor.
3. The computing system switching regulator as recited in claim 1 , further characterized by the error amplifier having an output coupled to the switch, an inverting input coupled to the node and a non-inverting input being coupled to a reference voltage.
4. The computing system switching regulator as recited in claim 3 , further characterized by:
a first impedance coupled between the node and the inverting input of the error amplifier; and
a second impedance disposed between the output and inverting input of the error amplifier.
5. The computing system switching regulator as recited in claim 4 , further characterized by a third resistor connected to the error amplifier inverting input, wherein the third resistor and first impedance substantially determines the output voltage of the regulator in proportion to the reference voltage.
6. The computing system switching regulator as recited in claim 3 , further comprising a plurality of power supplies having a common reference voltage and a common output coupled to the load.
7. The computing system switching regulator as recited in claim 3 , wherein the switching regulator is a buck switching regulator.
8. The computing system switching regulator as recited in claim 7 , further comprising a diode coupled to the junction of the switch and the inductor.
9. The computing system switching regulator as recited in claim 3 , wherein the error amplifier includes a pulse-width modulator for controlling the switch's opening and closing duration and frequency.
10. The computing system switching regulator as recited in claim 9 , wherein the switch further includes a MOSFET.
11. A switching regulator having a switch, an inductor and a filter capacitor coupled in series at junctions, and an error amplifier having an input for controlling the switch, CHARACTERIZED BY:
a first resistor coupled to the junction between the switch and the inductor;
a capacitor connected to the first resistor at a node and to the junction between the inductor and the filter capacitor;
wherein the node is coupled to the error amplifier input.
12. The computing system switching regulator as recited in claim 11 , further characterized by a second resistor disposed in parallel with the capacitor.
13. The computing system switching regulator as recited in claim 11 , further characterized by the error amplifier having an output coupled to the switch, an inverting input coupled to the node and a non-inverting input being coupled to a reference voltage.
14. The computing system switching regulator as recited in claim 13 , further characterized by:
a first impedance coupled between the node and the inverting input of the error amplifier; and
a second impedance disposed between the output and inverting input of the error amplifier.
15. The computing system switching regulator as recited in claim 14 , further characterized by a third resistor connected to the error amplifier inverting input, wherein the third resistor and first impedance substantially determines the output voltage of the regulator in proportion to the reference voltage.
16. The computing system switching regulator as recited in claim 13 , further comprising a plurality of power supplies having a common reference voltage and a common output coupled to the load.
17. The computing system switching regulator as recited in claim 13 , wherein the switching regulator is a buck switching regulator.
18. The computing system switching regulator as recited in claim 17 , further comprising a diode coupled to the junction of the switch and the inductor.
19. The computing system switching regulator as recited in claim 13 , wherein the error amplifier includes a pulse-width modulator for controlling the switch's opening and closing duration and frequency.
20. The computing system switching regulator as recited in claim 19 , wherein the switch further includes a MOSFET.
21. For use with a switching regulator having an inductor with an internal resistance and subject to a voltage drop thereacross, a feedback circuit, comprising:
a feedback resistor coupled to the inductor; and
a capacitor series - coupled to the feedback resistor and coupled to a fixed potential associated with the switching regulator, the feedback resistor and capacitor configured to provide a signal to regulate the switching regulator as a function of the voltage drop across the inductor.
22. The circuit as recited in claim 21 wherein the switching regulator, further comprises:
a switch coupled between an input of the switching regulator and the inductor;
an error amplifier coupled to and configured to control the switch;
a first impedance and resistor coupled to an inverting input of the error amplifier; and
a second impedance interposed between an output of the error amplifier and the inverting input of the error amplifier.
23. The circuit as recited in claim 21 further comprising a compensating resistor coupled to the capacitor.
24. The circuit as recited in claim 21 wherein the series- coupled feedback resistor and capacitor are coupled across the inductor.
25. The circuit as recited in claim 21 wherein the switching regulator is parallel- coupled to a plurality of switching regulators sharing a common output coupled to a load.
26. The circuit as recited in claim 21 wherein the switching regulator is a buck switching regular.
27. The circuit as recited in claim 21 wherein the switch regulator further comprises a diode coupled to the inductor.
28. The circuit as recited in claim 21 wherein the switching regulator further comprises a pulse- width modulator coupled to a switch of the switching regulator.
29. The circuit as recited in claim 21 wherein the switching regulator further comprises a filter capacitor coupled to an output thereof.
30. The circuit as recited in claim 21 wherein the switching regulator is configured to power a microprocessor of a computer system.
31. For use with a switching regulator having an inductor with an internal resistance and subject to a voltage drop thereacross, a method for configuring a feedback path to provide a signal to regulate the switching regulator, comprising:
coupling a feedback resistor to the inductor; and
series - coupling a capacitor to the feedback resistor and coupled to a fixed potential associated with the switching regulator, the feedback resistor and capacitor configured to provide the signal to regulate the switching regulator as a function of the voltage drop across the inductor.
32. The method as recited in claim 31 wherein the switching regulator, further comprises:
a switch coupled between an input of the switching regulator and the inductor;
an error amplifier coupled to and configured to control the switch;
a first impedance and resistor coupled to an inverting input of the error amplifier; and
a second impedance interposed between an output of the error amplifier and the inverting input of the error amplifier.
33. The method as recited in claim 31 further comprising coupling a compensating resistor to the capacitor.
34. The method as recited in claim 31 further comprising coupling the series- coupled feedback resistor and capacitor across the inductor.
35. The method as recited in claim 31 wherein the switching regulator is parallel- coupled to a plurality of switching regulators sharing a common output coupled to a load.
36. The method as recited in claim 31 wherein the switching regulator is a buck switching regulator.
37. The method as recited in claim 31 wherein the switch regulator further comprises a diode coupled to the inductor.
38. The method as recited in claim 31 wherein the switching regulator further comprises a pulse- width modulator coupled to a switch of the switching regulator.
39. The method as recited in claim 31 wherein the switching regulator further comprises a filter capacitor coupled to an output thereof.
40. The method as recited in claim 31 wherein the switching regulator is configured to power a microprocessor of a computer system.
41. A switching regulator having an input and configured to power a load coupled to an output thereof, comprising:
a switch coupled to the input;
an inductor, coupled to the switch, having an internal resistance and subject to a voltage drop thereacross;
a filter capacitor interposed between the inductor and the output; and
a feedback circuit, including:
a feedback resistor coupled to the inductor; and
a capacitor series - coupled to the feedback resistor and coupled to a fixed potential associated with the switching regulator, the feedback resistor and capacitor configured to provide a signal to control the switch of the switching regulator as a function of the voltage drop across the inductor.
42. The switching regulator as recited in claim 41 further comprising an error amplifier coupled to and configured to control the switch.
43. The switching regulator as recited in claim 42 , further comprising:
a first impedance and resistor coupled to an inverting input of the error amplifier; and
a second impedance interposed between an output of the error amplifier and the inverting input of the error amplifier.
44. The switching regulator as recited in claim 41 wherein the feedback circuit further comprises a compensating resistor coupled to the capacitor.
45. The switching regulator as recited in claim 41 wherein the feedback circuit is coupled across the inductor.
46. The switching regulator as recited in claim 41 wherein the switching regulator is parallel- coupled to a plurality of switching regulators sharing a common output coupled to the load.
47. The switching regulator as recited in claim 41 wherein the switching regulator is a buck switching regulator.
48. The switching regulator as recited in claim 41 further comprising a diode coupled to the inductor.
49. The switching regulator as recited in claim 41 further comprising a pulse- width modulator coupled to the switch of the switching regulator.
50. The switching regulator as recited in claim 41 wherein the load comprises a microprocessor of a computer system.Cited by (0)
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