Current limiting circuit

Abstract

The present invention relates to a current limiting circuit for controlled semiconductor power components, in particular to a current limiting circuit for power transistors which is independent of its voltage supply. A current limiting circuit for controlled semiconductor power components, in particular for power transistors, with a sense resistor, which is connected in series with the main current path of the controlled semiconductor power component, generating a voltage drop proportional to the current through the controlled semiconductor power component. A current mirror circuit device has a first current source device for generating a first current between a first and a second reference-ground potential. A second current source device generates a second current between the control potential of the control terminal of the semiconductor power component and a third reference-ground potential. A current source coupling circuit couples the first and second current source devices in response to the voltage drop of the sense resistor. When the voltage drop is greater than a predetermined value, the second current, for the purpose of lowering the control potential, is increased in order to limit the current through the semiconductor power component.

I claim:  
     
       1. A current limiting circuit for a controlled semiconductor power component having a main current path, a source terminal, and a control terminal, the circuit which comprises: 
       a sense resistor connected in series with a main current path of a controlled semiconductor power component, said sense resistor having a terminal connected to a source terminal of the semiconductor power component;  
       a first supply voltage terminal and a second supply voltage terminal;  
       a first bipolar transistor having a collector, an emitter, a base, and load path, a second bipolar transistor having a collector, a base, and a load path, and a current source connected in series with said load paths between said first supply voltage terminal and said terminal of said sense resistor connected to the source terminal of the semiconductor power component, said first bipolar transistor and said second bipolar transistors being connected such that respective collector currents thereof are proportional to one another;  
       a third bipolar transistor having an emitter and a load path, and a fourth bipolar transistor having a base, a collector, and a load path connected in series with said load path of said third bipolar transistor between the control terminal and said second supply voltage terminal, said emitter of said third bipolar transistor receiving a current impressed on said emitter proportional to a collector current of said fourth bipolar transistor;  
       said collector and said base of said first bipolar transistor being connected to said base of said third bipolar transistor;  
       said base of said second bipolar transistor being coupled to a node between said emitter of said third bipolar transistor and said collector of said fourth bipolar transistor;  
       said base of said fourth bipolar transistor being coupled to a node between said emitter of said first bipolar transistor and said collector of said second bipolar transistor;  
       whereby an emitter-to-base voltage of said fourth bipolar transistor contains, as voltage components, a voltage drop across said sense resistor, an emitter-to-base voltage of said second and third bipolar transistors with positive sign, and an emitter-to-base voltage of said first bipolar transistor with negative sign, and further voltage components resulting from differences between emitter-to-base voltages of further bipolar transistors operated with a different emitter current density; and  
       wherein said bipolar transistors are of the same type.  
     
     
       2. The current limiting circuit according to  claim 1 , wherein at least one of said first, second, third, and fourth bipolar transistors ( 51 ′- 54 ′;  61 - 64 ) has an emitter area different from an emitter area of at least another one of said bipolar transistors. 
     
     
       3. The current limiting circuit according to  claim 1 , which further comprises: 
       a fifth bipolar transistor and a sixth bipolar transistor connected, each in series with an associated current source, between said first reference-ground potential and said second reference-ground potential;  
       wherein said base of said second bipolar transistor is connected to a node between said emitter of said fifth bipolar transistor and a corresponding current source, and said base of said fifth bipolar transistor is connected to a node between said emitter of said third bipolar transistor and said collector of the fourth bipolar transistor; and  
       wherein said base of said fourth bipolar transistor is connected to a node between said emitter of the sixth bipolar transistor and a corresponding current source, and said base of the sixth bipolar transistor is connected to a node between said emitter of said first bipolar transistor and said collector of said second bipolar transistor.  
     
     
       4. The current limiting circuit according to  claim 3 , wherein said current sources of said fifth bipolar transistor and said sixth bipolar transistors are formed by respective resistors. 
     
     
       5. The current limiting circuit according to  claim 3 , wherein said current sources of said fifth bipolar transistor and said sixth bipolar transistors are formed by respective NMOS transistors. 
     
     
       6. The current limiting circuit according to  claim 5 , wherein a common gate potential of said NMOS transistors is a potential of a common base terminal of said first and third bipolar transistors. 
     
     
       7. A current limiting circuit for a controlled semiconductor power component driven with a drive potential and having a main current path, comprising: 
       a current sense resistor connected in series with a main current path of a controlled semiconductor power component;  
       a load output terminal;  
       a first current mirror including a first PNP bipolar transistor having a collector and having an emitter connected to a drive potential of a semiconductor power component, and a second PNP bipolar transistor having an emitter connected to the drive potential of the semiconductor power component;  
       a second current mirror including a third PNP bipolar transistor having an emitter connected to the drive potential of the semiconductor power component, and a fourth PNP bipolar transistor having an emitter connected to the drive potential of the semiconductor power component;  
       a third current mirror including a first MOS transistor having a source connected to reference ground potential, and a second MOS transistor having a drain and a source connected to the reference-ground potential;  
       a fourth current mirror including a third MOS transistor having a drain and having a source connected to the reference ground potential and a fourth MOS transistor having a collector and a source connected to the reference ground potential;  
       a first NPN bipolar transistor having a base, a collector, and an emitter connected to said drain of said third MOS transistor;  
       a second NPN bipolar transistor connected between said collector of said fourth PNP bipolar transistor and a terminal of said sense resistor connected to the semiconductor power component, said second NPN bipolar transistor having a base;  
       a third NPN bipolar transistor having a base connected to said base of said first NPN bipolar transistor, a collector, and an emitter connected to said drain of said second MOS transistor and to said base of said second NPN bipolar transistor;  
       a fourth NPN bipolar transistor connected between said collector of the first PNP bipolar transistor and the terminal of said sense resistor connected to said load output terminal, said fourth NPN bipolar transistor having a base connected to of said emitter of said first NPN bipolar transistor;  
       a diode connecting said collectors of said first and said third NPN bipolar transistors to the drive potential of the semiconductor power component in the forward direction;  
       a fifth MOS transistor and a sixth MOS transistor connected in series between the reference-ground potential of said fourth current mirror and a terminal of the semiconductor power component connected to a supply potential;  
       said fifth MOS transistor having a gate connected to said collector of said third PNP bipolar transistor and said sixth MOS transistor having a gate connected to the drive potential of the semiconductor power component; and  
       said base of said first NPN bipolar transistor and said base of said third NPN bipolar transistor being commonly connected to a node between said fifth MOS transistor and said sixth MOS transistors.  
     
     
       8. The current limiting circuit according to  claim 7 , wherein: 
       said first and second NPN bipolar transistors are connected to render respective collector currents thereof proportional to one another;  
       said third NPN bipolar transistor is connected to have a current impressed on said emitter proportional to a collector current of said fourth NPN bipolar transistor;  
       an emitter-to-base voltage of said fourth NPN bipolar transistor contains, as voltage components, a voltage drop across said sense resistor, an emitter-to-base voltage of said second and third NPN bipolar transistors with positive sign, and an emitter-to-base voltage of said first NPN bipolar transistor with negative sign.  
     
     
       9. The current limiting circuit according to  claim 7 , wherein at least one of said first, second, third, and fourth bipolar transistors ( 51 ′- 54 ′;  61 - 64 ) has an emitter area different from an emitter area of at least another one of said bipolar transistors. 
     
     
       10. The current limiting circuit according to  claim 7 , which further comprises: 
       a fifth bipolar transistor and a sixth bipolar transistor connected, each in series with an associated current source, between said first reference-ground potential and said second reference-ground potential;  
       wherein said base of said second bipolar transistor is connected to a node between said emitter of said fifth bipolar transistor and a corresponding current source, and said base of said fifth bipolar transistor is connected to a node between said emitter of said third bipolar transistor and said collector of the fourth bipolar transistor; and  
       wherein said base of said fourth bipolar transistor is connected to a node between said emitter of the sixth bipolar transistor and a corresponding current source, and said base of the sixth bipolar transistor is connected to a node between said emitter of said first bipolar transistor and said collector of said second bipolar transistor.  
     
     
       11. The current limiting circuit according to  claim 10 , wherein said current sources of said fifth bipolar transistor and said sixth bipolar transistors are formed by respective resistors. 
     
     
       12. The current limiting circuit according to  claim 10 , wherein said current sources of said fifth bipolar transistor and said sixth bipolar transistors are formed by respective NMOS transistors. 
     
     
       13. The current limiting circuit according to  claim 12 , wherein a common gate potential of said NMOS transistors is a potential of a common base terminal of said first and third bipolar transistors.