Method and apparatus for testing LCD panel array prior to shorting bar removal

Abstract

Final testing of an LCD panel or the like is performed after preliminary testing for short circuit defects. During final testing, the panel is exposed to signals at the shorting bars and the resulting display pattern is imaged. The resulting image data then is processed at a computer system to determine whether the resulting display pattern differs from an expected display pattern. If differences are present then an open circuit or pixel defect is present. The applied test signals and the pattern or differences determine the type of defect present. For an open circuit defect along a gate line, a partial row (column) of the resulting display pattern does not activate. For an open circuit along a drive line, a partial column (row) of the resulting display does not activate. Pixel shorts are identified by applying test signals to the shorting bars during a first test cycle, then imaging the display during a second test cycle after at least one of the test signals is removed. Pixels which remain active that should be inactive have short circuit defects.

What is claimed is:  
     
       1. A method for testing an LCD panel having a plurality of drive lines oriented in a first direction and a plurality of gate lines oriented in a second generally orthogonal direction creating row/column intersections, each drive line which terminates along a first edge of the panel being shorted together by a first shorting means, each gate line which terminates along a second edge of the panel being shorted together by a second shorting means, said method comprising the steps: 
       applying a first test signal to said first shorting means and a second test signal to said second shorting means to generate a first resulting display pattern;  
       comparing said first resulting display pattern to an expected display pattern, a difference between the resulting display pattern and the expected display pattern signifying that the panel has a defect.  
     
     
       2. The method of  claim 1 , further comprising the step of imaging a portion of said first resulting display pattern to generate sensed image data; wherein said expected display pattern comprises expected image data; and wherein said step of comparing comprises processing said sensed image data by comparing said sensed image data to expected image data, a difference between sensed image data and expected image data resulting from a panel defect. 
     
     
       3. A method for testing an LCD panel having a plurality of drive lines oriented in a first direction and a plurality of gate lines oriented in a second generally orthogonal direction creating row/column intersections, each drive line which terminates along a first edge of the panel being shorted together by a first shorting means, each drive line which terminates along a second opposing edge of the panel being shorted together by a second first shorting means, each gate line which terminates along a third edge of the panel being shorted together by a third shorting means, each gate line which terminates along a fourth edge of the panel being shorted together by a fourth shorting means, said method comprising the steps: 
       applying a first test signal to said first shorting means, a second test signal to said second shorting means, a third test signal to said third shorting means and a fourth test signal to said fourth shorting means to generate a resulting display pattern;  
       comparing said resulting display pattern to an expected display pattern, a difference between the resulting display pattern and the expected display pattern signifying that the panel has a defect.  
     
     
       4. The method of  claim 3 , further comprising the step of imaging a portion of said resulting display pattern to generate sensed image data; wherein said expected display pattern comprises expected image data; and wherein said step of comparing comprises processing said sensed image data by comparing said sensed image data to expected image data, a difference between sensed image data and expected image data resulting from a panel defect. 
     
     
       5. An apparatus for testing an LCD panel, the panel having a plurality of drive lines oriented in a first direction and a plurality of gate lines oriented in a second generally orthogonal direction creating row/column intersections, each drive line which terminates along a first edge of the panel being shorted together by a first shorting means, each gate line which terminates along a second edge of the panel being shorted together by a second shorting means, said apparatus comprising: 
       means for applying a first test signal to said first shorting means and for applying a second test signal to said second shorting means to generate a resulting display pattern;  
       means for imaging the resulting display pattern to generate sensed image data;  
       means for comparing the sensed image data to expected image data, a difference between the sensed image data and the expected image data signifying that the panel has a defect.  
     
     
       6. The apparatus of  claim 5 , in which the panel is an interdigitated panel having another plurality of drive lines which are shorted together by a third shorting means and another plurality of gate lines which are shorted by a fourth shorting means; in which said applying means also is for applying a third test signal to the third shorting means and a fourth test signal to the fourth shorting means to generate said resulting display pattern. 
     
     
       7. The apparatus of  claim 6 , in which said first test signal and said third test signal are inactive, and said second test signal and said fourth test signal are active, and wherein a difference between sensed image data and expected image data signifies a pixel short circuit defect. 
     
     
       8. The apparatus of  claim 6 , in which said first, second, third and fourth test signals are active, and wherein a difference between sensed image data and expected image data signifies that the panel has an open circuit defect. 
     
     
       9. The apparatus of  claim 6 , in which said first, second, third and fourth test signals are active during a first test cycle, said first and third test signals being switched to inactive during a second test cycle, wherein a difference between sensed image data and expected image data during said second test cycle signifies that the panel has a short circuit. 
     
     
       10. The method of  claim 2  wherein said imaging step comprises imaging said portion of said first resulting display pattern using an optical sensing instrument to generate said sensed image data. 
     
     
       11. The method of  claim 10  wherein said optical sensing instrument is a television camera. 
     
     
       12. The method of  claim 10  wherein said optical sensing instrument is a video camera. 
     
     
       13. The method of  claim 10  wherein said optical sensing instrument is a line- scan camera.   
     
     
       14. The method of  claim 1  further comprising imaging a portion of said first resulting display pattern to generate an expected display pattern using a sensing instrument. 
     
     
       15. The method of  claim 14  wherein the sensing instrument comprises a video camera. 
     
     
       16. The method of  claim 14  wherein the sensing instrument comprises a television camera. 
     
     
       17. The method of  claim 14  wherein the sensing instrument comprises a line- scan camera.   
     
     
       18. The method of  claim 4  wherein said imaging step comprises imaging said portion of said resulting display pattern using an optical sensing instrument to generate said sensed image data. 
     
     
       19. The method of  claim 18  wherein said optical sensing instrument is a video camera. 
     
     
       20. The method of  claim 18  wherein said optical sensing instrument is a television camera. 
     
     
       21. The method of  claim 18  wherein said optical sensing instrument is a line- scan camera.   
     
     
       22. The apparatus of  claim 5 , wherein said means for imaging comprises a sensing instrument. 
     
     
       23. The apparatus of  claim 22  wherein the sensing instrument is an optical sensing instrument. 
     
     
       24. The apparatus of  claim 22  wherein said optical sensing instrument is selected from a television or video camera or a line- scan camera.   
     
     
       25. The method of  claim 3  wherein the expected display pattern is for an all pixels turned off logic state. 
     
     
       26. The method of  claim 3  wherein the expected display pattern is for an all pixels turned on logic state. 
     
     
       27. The method of  claim 3  wherein the expected display pattern is for a horizontal stripes logic state. 
     
     
       28. The method of  claim 3  wherein the expected display pattern is for an inverse horizontal stripes logic state. 
     
     
       29. The method of  claim 3  wherein the expected display pattern is for a checkerboard cycle  1  logic state. 
     
     
       30. The method of  claim 3  wherein the expected display pattern is for a checkerboard cycle  2  logic state. 
     
     
       31. The method of  claim 3  wherein the expected display pattern is for an inverse checkerboard cycle  1  logic state. 
     
     
       32. The method of  claim 3  wherein the expected display pattern is for an inverse checkerboard cycle  2  logic state. 
     
     
       33. The method of  claim 1  wherein the first test signal and the second test signal are provided at an intermediary voltage to create a mid- level logic state.   
     
     
       34. The method of  claim 1  wherein the defect is a short circuit. 
     
     
       35. The method of  claim 1  wherein the defect is an open circuit. 
     
     
       36. The method of  claim 1  wherein said LCD panel comprises an array of pixels. 
     
     
       37. The method of  claim 1  wherein said LCD panel is composed of a portion of a plate. 
     
     
       38. The method of  claim 3  wherein said LCD panel comprises an array of pixels. 
     
     
       39. The method of  claim 3  wherein said LCD panel is composed of a portion of a plate. 
     
     
       40. The apparatus of  claim 5  wherein said LCD panel comprises an array of pixels. 
     
     
       41. The apparatus of  claim 5  wherein said LCD panel is composed of a plate. 
     
     
       42. The method of  claim 1  wherein said testing method of the LCD panel is performed on a first plate having said plurality of drive lines and said plurality of gate lines. 
     
     
       43. The method of  claim 42  further comprising imaging a portion of said first resulting display pattern to generate an expected display pattern using a sensing instrument. 
     
     
       44. The method of  claim 1  wherein said testing method of the LCD panel is performed on a first plate having said plurality of drive lines and said plurality of gate lines, and a plurality of transistors, where each of the transistors is coupled between at least one drive line and at least one gate line. 
     
     
       45. The method of  claim 44  further comprising imaging a portion of said first resulting display pattern to generate an expected display pattern using a sensing instrument. 
     
     
       46. The method of  claim 45  wherein the sensing instrument is selected from a video camera, a line scan camera, or a television camera. 
     
     
       47. The method of  claim 1  wherein said testing method of the LCD panel is performed on a portion of a first plate having said plurality of drive lines and said plurality of gate lines, and a plurality of transistors, where each of the transistors is coupled between at least one drive line and at least one gate line, the first plate further comprising a plurality of capacitors, where each of the capacitors is coupled to one of the transistors. 
     
     
       48. The method of  claim 47  further comprising imaging a portion of said first resulting display pattern to generate an expected display pattern using a sensing instrument. 
     
     
       49. The method of  claim 1  wherein said testing method of the LCD panel is performed on a portion of first plate having said plurality of drive lines and said plurality of gate lines, and a plurality of transistors, where each of the transistors is coupled between at least one drive line and at least one gate line, the first plate further comprising a plurality of capacitors, where each of the capacitors is coupled to one of the transistors, the first plate being coupled to a second plate having a color filter coupled thereto, and a liquid crystal display material sandwiched between said first and second plates. 
     
     
       50. The method of  claim 49  further comprising imaging a portion of said first resulting display pattern to generate an expected display pattern using a sensing instrument. 
     
     
       51. The method of  claim 50  wherein the sensing instrument is selected from a video camera, a line scan camera, or a television camera. 
     
     
       52. The method of  claim 1  wherein said testing method of the LCD signal is performed on a portion of a first plate having said plurality of drive lines and said plurality of gate lines, and a plurality of transistors, where each of the transistors is coupled between at least one drive line and at least one gate line, the first plate further comprising a plurality of capacitors, where each of the capacitors is coupled to one of the transistors, the first plate being coupled to a second plate through a liquid crystal display material sandwiched between said first and second plates. 
     
     
       53. The method of  claim 52  further comprising imaging a portion of said first resulting display pattern to generate an expected display pattern using a sensing instrument. 
     
     
       54. The method of  claim 53  wherein the sensing instrument is selected from a video camera, a line scan camera, or a television camera. 
     
     
       55. The method of  claim 3  wherein said testing method of the LCD panel is performed on a portion of a first plate having said plurality of drive lines and said plurality of gate lines. 
     
     
       56. The method of  claim 3  wherein said testing method of the LCD panel is performed on a portion of a first plate having said plurality of drive lines and said plurality of gate lines, and a plurality of transistors, where each of the transistors is coupled between at least one drive line and at least one gate line. 
     
     
       57. The method of  claim 3  wherein said testing method of the LCD panel is performed on a portion of a first plate having said plurality of drive lines and said plurality of gate lines, and a plurality of transistors, where each of the transistors is coupled between at least one drive line and at least one gate line, the first plate further comprising a plurality of capacitors, where each of the capacitors is coupled to one of the transistors. 
     
     
       58. The method of  claim 3  wherein said testing method of the LCD panel is performed on a portion of a first plate having said plurality of drive lines and said plurality of gate lines, and a plurality of transistors, where each of the transistors is coupled between at least one drive line and at least one gate line, the first plate further comprising a plurality of capacitors, where each of the capacitors is coupled to one of the transistors, the first plate being coupled to a second plate having a color filter coupled thereto, and a liquid crystal display material sandwiched between said first and second plates. 
     
     
       59. The method of  claim 3  wherein said testing method of the LCD panel is performed on a portion of a first plate having said plurality of drive lines and said plurality of gate lines, and a plurality of transistors, where each of the transistors is coupled between at least one drive line and at least one gate line, the first plate further comprising a plurality of capacitors, where each of the capacitors is coupled to one of the transistors, the first plate being coupled to a second plate through a liquid crystal display material sandwiched between said first and second plates. 
     
     
       60. The apparatus of  claim 5  wherein said testing method of the LCD panel is performed on a portion of a first plate having said plurality of drive lines and said plurality of gate lines. 
     
     
       61. The apparatus of  claim 5  wherein said testing method of the LCD panel is performed on a portion of a first plate having said plurality of drive lines and said plurality of gate lines, and a plurality of transistors, where each of the transistors is coupled between at least one drive line and at least one gate line. 
     
     
       62. The apparatus of  claim 5  wherein said testing method of the LCD panel is performed on a portion of a first plate having said plurality of drive lines and said plurality of gate lines, and a plurality of transistors, where each of the transistors is coupled between at least one drive line and at least one gate line, the first plate further comprising a plurality of capacitors, where each of the capacitors is coupled to one of the transistors. 
     
     
       63. The apparatus of  claim 5  wherein said testing method of the LCD panel is performed on a portion of a first plate having said plurality of drive lines and said plurality of gate lines, and a plurality of transistors, where each of the transistors is coupled between at least one drive line and at least one gate line, the first plate further comprising a plurality of capacitors, where each of the capacitors is coupled to one of the transistors, the first plate being coupled to a second plate having a color filter coupled thereto, and a liquid crystal display material sandwiched between said first and second plates. 
     
     
       64. The apparatus of  claim 5  wherein said testing method of the LCD panel is performed on a portion of a first plate having said plurality of drive lines and said plurality of gate lines, and a plurality of transistors, where each of the transistors is coupled between at least one drive line and at least one gate line, the first plate further comprising a plurality of capacitors, where each of the capacitors is coupled to one of the transistors, the first plate being coupled to a second plate through a liquid crystal display material sandwiched between said first and second plates.