P
USRE38588EExpiredUtilityPatentIndex 61

Lead material for electronic part, lead and semiconductor device using the same

Assignee: FURUKAWA ELECTRIC CO LTDPriority: Dec 10, 1996Filed: Aug 14, 2002Granted: Sep 14, 2004
Est. expiryDec 10, 2016(expired)· nominal 20-yr term from priority
Inventors:TANIMOTO MORIMASASUZUKI SATOSHIMATSUDA AKIRASUGIE KINYA
H10W 90/756H10W 74/00H10W 72/5525H10W 72/5524H10W 70/457H10W 72/00B32B 15/01C22C 13/00C22C 13/02Y10T428/12715Y10T428/12708
61
PatentIndex Score
2
Cited by
8
References
20
Claims

Abstract

A lead material for an electronic part having no adverse effect on the environment, having excellent solderability, desirable welding strength during welding and a low degree of nonuniform thickness of the plated layer during reflow processing. The lead material has a first plated layer and a second plated layer, both of which do not contain Pb, laminated on the surface of a conductive substrate in such order. The melting point of the second plated layer is lower than that of the first plated layer. The first and second plated layers are made of a Sn substance and a Sn alloy, respectively or vice versa.

Claims

exact text as granted — not AI-modified
What is claimed is:  
     
       1. A lead material for an electronic part comprising 
       a first plated layer laminated on a surface of a conductive substrate, a second plated layer laminated on said first plated layer, a material for said second plated layer having a lower melting temperature than a material for said first plated layer,  
       wherein said first plated layer is made of a Sn substance and said second plated layer is made of a Sn alloy containing at least one element selected from the group consisting of Ag, Bi, Cu, In and Zn.  
     
     
       2. A lead material for an electronic part according to  claim 1 , wherein 
       said first plated layer has a thickness of t 1  and said second plated layer has a thickness of t 2 , the thickness t 1  and the thickness t 2  satisfy a relationship expressed as  
       1 μm≦t 1 ≦15 μm, 0.5 μm≦t 2 ≦5 μm and  
       t 2 /t 1 ≦1.0.  
     
     
       3. A lead material for an electronic part according to  claim 2 , wherein 
       the thickness t 1  and the thickness t 2  satisfy a relationship expressed as  
       5 μm≦t 1 +t 2 ≦15 μm.  
     
     
       4. A lead material for an electronic part according to  claim 1 , wherein 
       at least said second plated layer is subjected to reflow processing.  
     
     
       5. A lead material for an electronic part according to  claim 2 , wherein 
       at least said second plated layer is subjected to reflow processing.  
     
     
       6. A lead material for an electronic part according to  claim 3 , wherein 
       at least said second plated layer is subjected to reflow processing.  
     
     
       7. A lead comprising a lead material for an electronic part as recited in any one of claims  1 ,  2 ,  3 ,  4 ,  5  and  6 . 
     
     
       8. A semiconductor device having a lead comprising a lead material for an electronic part as recited in any one of claims  1 ,  2 ,  3 ,  4 ,  5  and  6 . 
     
     
       9. A lead material for an electronic part according to claim  1   2 , wherein t 1  is 6 to 10 μm, t 2  is 1 to 3 μm and t 2 /t 1  is 0.1 to 0.5; and the Sn alloy is Sn—Bi with a Bi content of 30 wt % or less. 
     
     
       10. A lead material for an electronic part according to claim  1   2 , wherein t 1  is 6 to 10 μm, t 2  is 1 to 3 μm and t 2 /t 1  is 0.1 to 0.5. 
     
     
       11. A lead material for an electronic part according to  claim 1 , wherein each of the first plated layer and the second plated layer do not contain Pb. 
     
     
       12. A lead material for an electronic part comprising a first plated layer laminated on a surface of a conductive substrate, a second plated layer laminated on said first plated layer, a material for said second plated layer having a lower melting temperature than a material for said first plated layer, wherein said first plated layer is made of a Sn alloy containing at least one element selected from the group consisting of Ag and Bi, and said second plated layer is made of a Sn alloy containing at least one element selected from the group consisting of Ag, Bi, Cu, In and Zn. 
     
     
       13. A lead material for an electronic part according to  claim 12 , wherein the first plated layer is made of a Sn—Bi alloy. 
     
     
       14. A lead material for an electronic part according to  claim 13 , wherein the Sn—Bi alloy is a Sn-   2   % Bi alloy.   
     
     
       15. A lead material for an electronic part according to  claim 14 , wherein the second plated layer is made of a Sn- Bi alloy.   
     
     
       16. A lead material for an electronic part according to  claim 15 , wherein the Sn- Bi alloy of the second plated layer is a Sn -   10   % Bi alloy.   
     
     
       17. A lead material for an electronic part according to  claim 12 , wherein the first plated layer is made of a Sn- Ag alloy.   
     
     
       18. A lead material for an electronic part according  claim 17 , wherein the Sn- Ag alloy is a Sn -   3   % Ag alloy.   
     
     
       19. A lead material for an electronic part according to  claim 12 , wherein the first plated layer has a Bi content lower than a Bi content of the second plated layer. 
     
     
       20. A lead material for an electronic part which is subjected to reflow processing comprising a first plated layer laminated on a surface of a conductive substrate, a second plated layer laminated on said first plated layer, a material for said second plated layer having a lower melting temperature than a material for said first plated layer, wherein said first plated layer is made of Sn and said second plated layer is made of a Sn alloy containing at least one element selected from the group consisting of Ag, Bi, Cu, In and Zn, and after subjecting the lead material to a reflow processing, at least a portion of the at least one element in the Sn alloy of the second plated layer is diffused into the first plated layer.

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