TFT substrate with low contact resistance and damage resistant terminals

Abstract

A conductive film made of Al or alloy containing Al as a main component is formed on an underlying substrate. An upper conductive film is disposed on the conductive film. A first opening is formed through the upper conductive film. An insulating film is disposed on the upper conductive film A second opening is formed through the insulating film. An inner wall of the second opening is retreated from an inner wall of the first opening. An ITO film is formed covering a partial upper surface of the insulating film and inner surfaces of the first and second openings, and contacting a partial upper surface of the upper conductive film at a region inside of the second opening. Good electrical contact between an Al or Al alloy film and an ITO film can be established and productivity can be improved.

1. An ITO film contact structure comprising:
 a conductive film made of Al or alloy containing Al as a main component;  
 an upper conductive film disposed on said conductive film, formed with a first opening being bored through said upper conductive film, and made of a material different from Al;  
 an insulating film disposed on said upper conductive film and formed with a second opening, an inner wall of the second opening being retreated from an inner wall of the first opening; and  
 an ITO film covering a partial upper surface of said insulating film and inner surfaces of the first and second openings, said ITO film being contacted to a partial upper surface of said upper conductive film at a region defining a part of the inner wall of the second opening, and being contacted to a partial upper surface of said conductive film at a region defining a bottom of said first opening.  
 
     
     
       2. An ITO film contact structure according to  claim 1 , wherein a contact resistance between a material of said upper conductive film and ITO is smaller than a contact resistance between Al and ITO. 
     
     
       3. An ITO film contact structure according to  claim 2 , wherein said upper conductive film is made of a material selected from a group consisting of Ti, Mo, Ta, W, oxide of these metals, and nitride of these metals. 
     
     
       4. A TFT substrate comprising:
 an underlying substrate having an insulating surface;  
 a gate electrode disposed on the insulating surface of said underlying substrate;  
 a first insulating film covering the insulating surface of said underlying substrate and said gate electrode;  
 a channel layer made of semiconductor and disposed on said first insulating film, the channel layer overriding said gate electrode;  
 first and second conductive films made of Al or Al alloy and disposed on an upper surface of said channel layer on both sides of said gate electrode;  
 a first upper conductive film disposed on said first conductive film and formed with a first opening;  
 a second upper conductive film disposed on said second conductive film;  
 a second insulating film covering said first and second upper conductive films and said channel layer and formed with a second opening, an inner wall of the second opening being retreated from an inner wall of the first opening; and  
 an ITO film covering a partial upper surface of said second insulating film and inner surfaces of the first and second openings, and contacting a partial upper surface of said first upper conductive film at a region defining a part of the inner surface of the second opening.  
 
     
     
       5. A TFT substrate according to  claim 4 , further comprising:
 an external terminal disposed on the insulating surface of said underlying substrate and made of conductive material,  
 wherein said first and second insulating films cover said external terminal, and a third opening is formed through said first and second insulating films, the third opening having a bottom defined by a partial upper surface of said external terminal.  
 
     
     
       6. A TFT substrate according to  claim 5 , wherein an inner wall of the third opening in said second insulating film is retreated from an inner wall of the third opening in said first insulating film. 
     
     
       7. A TFT substrate according to  claim 4 , wherein said first and second upper conductive films are made of a material selected from a group consisting of Ti, Mo, Ta, W, oxide of these metals, and nitride of these metals. 
     
     
       8. A thin film transistor substrate comprising:
 a substrate having a principal surface;  
 a plurality of thin film transistors formed on the principal surface of said substrate, each thin film transistor including a gate electrode, a channel layer, a source electrode and a drain electrode;  
 a first terminal formed on the principal surface of said substrate, said first terminal being connected to one of the gate electrode and the drain electrode of at least one thin film transistor;  
 a protective insulating film formed on the principal surface of said substrate, covering the plurality of thin film transistors and said first terminal;  
 a first contact hole formed, at a position corresponding to the source electrode of each thin film transistor, through said protective insulating film to an upper surface of the source electrode;  
 a pixel electrode formed on said protective insulating film in correspondence with each thin film transistor, said pixel electrode being connected to the source electrode of a corresponding thin film transistor via said first contact hole;  
 a second contact hole formed in a ring,  at a position corresponding to said first terminal, through said protective insulating film to an upper surface of said first terminal, said second contact hole being disposed within an outer periphery of said first terminal as viewed along the direction normal to the principal surface of said substrate, and extending along the outer periphery so that said protective insulating film is left inside said ring  while no contact hole is formed in an area surrounded by said second contact hole; and  
 a first terminal protective conductive film formed on said protective insulating film, said first terminal protective conductive film being connected to said first terminal via said second contact hole, covering said protective insulating film left in the inner area of said first terminal, and being made of material same as material of said pixel electrode.  
 
     
     
       9. A thin film transistor according to  claim 8 , wherein said second contact hole is disposed inner than an outer periphery of said first terminal as viewed along the direction normal to the principal surface of said substrate, and extends along the outer periphery. 
     
     
       10. A thin film transistor according to  claim 8 , further comprising:
 a second terminal disposed between the principal surface of said substrate and said protective insulating film and connected to the other of the gate electrode and the drain electrode of at least one thin film transistor;  
 a third contact hole formed in a ring, at a position corresponding to said second terminal, through said protective insulating film to an upper surface of said second terminal, said third contact hole being disposed so that said protective insulating film is left inside said ring; and  
 a second terminal protective conductive film formed on said protective insulating film, said second terminal protective conductive film being connected to said second terminal via said third contact hole, covering said protective insulating film left in the inner area of said second terminal, and being made of material same as material of said pixel electrode.  
 
     
     
       11. A thin film transistor according to  claim 10 , wherein:
 said thin film transistor is an inversely staggered type thin film transistor wherein the channel layer is disposed over the gate electrode, and further comprises a gate insulating film between the gate electrode of said thin film transistor and the channel layer;  
 the source electrode includes at least a first conductive layer and a second conductive layer formed on the first conductive layer;  
 said first contact hole is also formed through the second conductive layer, and a side wall of said first contact has a step defined by a portion of an upper surface of the second conductive layer;  
 said pixel electrode is in contact with an upper surface of the second conductive layer at the step on the side wall of said first contact hole;  
 said first terminal is connected to the drain electrode of said thin film transistor and includes at least a first conductive layer and a second conductive layer same as the first and second conductive layers of the source electrode;  
 said second contact hole is also formed through the second conductive layer of said first terminal, and a side wall of said second contact has a step defined by a portion of an upper surface of the second conductive layer; and  
 said first terminal protective conductive film is in contact with an upper surface of the second conductive film at the step on the side wall of said second contact hole.  
 
     
     
       12. A thin film transistor according to  claim 11 , wherein the first and second conductive layers and said pixel electrode are made of material so that a contact resistance between said pixel electrode and the second conductive layer is lower than a contact resistance between the pixel electrode and the first conductive layer. 
     
     
       13. A thin film transistor according to  claim 11 , wherein said second contact hole includes a plurality of contact holes discretely distributed. 
     
     
       14. A thin film transistor according to  claim 11 , wherein a boarder shape of said second contact hole includes a zigzag pattern as viewed along the direction normal to the principal surface of said substrate. 
     
     
       15. A thin film transistor substrate comprising:
 a substrate having a principal surface;  
 a plurality of thin film transistors formed on the principal surface of said substrate, each thin film transistor including a gate electrode, a channel layer, a source electrode and a drain electrode, said thin film transistor being an inversely staggered type thin film transistor;  
 a contact area formed on the principal surface of said substrate; said contact area being connected to the drain electrode of at least one thin film transistor and includes at least a first conductive film and a second conductive film formed on the first conductive film;  
 a protective insulating film formed on the principal surface of said substrate, covering said thin film transistor and said contact area;  
 a first contact hole formed, at a position corresponding to the source electrode of each thin film transistor, through said protective insulating film;  
 a pixel electrode formed on said protective insulating film in correspondence with each thin film transistor, said pixel electrode being connected to the source electrode of a corresponding thin film transistor via said first contact hole;  
 a second contact hole formed, at a position corresponding to said contact area, through said protective insulating film and said second conductive film, said second contact hole having a step defined by a portion of an upper surface of the second conductive film; and  
 a terminal conductive film formed on said protective insulating film in correspondence with said contact area, said terminal conductive film being connected to said contact area via said second contact hole, and electrically connected to an upper surface of the second conductive film defining the step on the side wall of said second contact hole.  
 
     
     
       16. A thin film transistor according to  claim 15 , wherein the first and second conductive layers and said pixel electrode are made of material so that a contact resistance between said pixel electrode and the second conductive layer is lower than a contact resistance between the pixel electrode and the first conductive layer. 
     
     
       17. A thin film transistor according to  claim 15 , wherein said second contact hole includes a plurality of contact holes discretely distributed. 
     
     
       18. A thin film transistor according to  claim 15 , wherein a border shape of said second contact hole includes a zigzag pattern as viewed along the direction normal to the principal surface of said substrate. 
     
     
       19. An ITO film contact structure comprising:
 a lower conductive film made of Al or alloy containing Al as a main component;  
 an upper conductive film disposed on said lower conductive film and made of a material different from Al;  
 an insulating film disposed on said upper conductive film;  
 an opening being bored through said lower conductive film, said upper conductive film and said insulating film, an inner side wall of said opening having a step defined by a part of a top surface of said upper conductive film, and a bottom of said opening being defined by a part of a top surface of said lower conductive film; and  
 an ITO film covering a partial upper surface of said insulating film and said inner side wall and bottom of said opening, said ITO film being contacted to said upper conductive film at the step of said opening, and being contacted to said lower conductive film at the bottom of said opening.  
 
     
     
       20. A thin film transistor substrate according to  claim 8 , wherein said second contact hole comprises a plurality of contact holes, which are arranged along said outer periphery of said first terminal.