Method and apparatus for measuring a low power signal

Abstract

Low intensity light is incident upon a photodiode whose output is coupled to an integrator. The output of the integrator is coupled to an input of an A/D converter, whose output is coupled to a microprocessor, whose output is coupled to a filter. A second output of the microprocessor is coupled to a gate electrode of a FET to provide a reset signal to the FET to reset the integrator. The microprocessor compares the digital samples of the integrated signal from the A/D converter and, firstly, generates the reset signal if a sample is beyond a set limit, and, secondly, calculates delta values between adjacent samples and interpolates the delta values for the reset periods so as to provide a continuous data stream which can be filtered by a filter matched to the form of the original signal.

1. A method of measuring a low power signal, comprising:
 receiving a low power signal from a signal source;  
 integrating the received low power signal over controllable integration periods to provide an integration signal;  
 sampling the integration signal at a frequency substantially higher than a frequency of the integration periods to provide digital samples of the integration signal;  
 determining differences between digital samples to provide a stream of delta values; and  
 filtering the stream of delta values to provide a filtered signal substantially matching the received low power signal.  
 
     
     
       2. A method of measuring a low power signal according to  claim 1 , further comprising interpolating the delta values between integration periods so that the stream of delta values is continuous. 
     
     
       3. A method of measuring a low power signal according to  claim 1 , further comprising comparing the digital samples to a predetermined value and resetting the integration period if a digital sample has a value greater than the predetermined value. 
     
     
       4. An apparatus for measuring a low power signal, comprising:
 an input terminal for receiving a low power signal from a signal source;  
 an integrator coupled to the input terminal and having an output for providing an integration signal formed by integrating the received low power signal over controllable integration periods;  
 a digitiser coupled to the output of the integrator for sampling the integration signal at a frequency substantially higher than a frequency of the integration periods to provide digital samples of the integration signal at an output;  
 a processing means having an input coupled to the output of the digitiser for determining differences between digital samples to provide a stream of delta values at an output; and  
 a filter having an input coupled to the output of the processing means for filtering the stream of delta values to provide a filtered signal substantially matching the received low power signal at an output.  
 
     
     
       5. An apparatus for measuring a low power signal according to  claim 4 , wherein the processing means includes interpolation means for interpolating the delta values between integration periods so that the stream of delta values is continuous. 
     
     
       6. An apparatus, for measuring a low power signal according to  claim 4 , wherein the integrator comprises an operational amplifier having a first input coupled to the first terminal and an output, a capacitor coupled between the first input and the output of the operational amplifier, and a transistor having current electrodes coupled between the first input and the output of the operational amplifier and a control electrode for receiving a reset signal for controlling the integration periods. 
     
     
       7. An apparatus for measuring a low power signal according to  claim 6 , wherein the transistor is a Field Effect Transistor. 
     
     
       8. An apparatus for measuring a low power signal according to  claim 6 , wherein the processing means includes comparison means for comparing the digital samples to a predetermined value and for providing the reset signal for resetting integration period if a digital sample has a value greater than the predetermined value. 
     
     
       9. An apparatus for measuring a low power signal according to  claim 4 , wherein the digitiser comprises an analog-to-digital converter. 
     
     
       10. An apparatus for measuring a low power signal according to  claim 4 , wherein the filter is matched to the form of the low power signal. 
     
     
       11. An apparatus for measuring a low power signal according to  claim 10 , wherein the filter is a Savitszki-Golay filter. 
     
     
       12. A method of measuring a low power signal, comprising:
   receiving a low power signal from a signal source;    
   integrating the received low power signal over controllable integration periods to provide an integration signal;    
   sampling the integration signal at a frequency substantially higher than a frequency of the integration periods to provide digital samples of the integration signal;    
   comparing the digital samples to a predetermined value; and   
 resetting the integration period when a value of a digital value exceeds the predetermined value. 
 
     
     
       13. A method of measuring a low power signal, comprising:
   receiving a low power signal from a signal source;    
   integrating the received low power signal over controllable integration periods to provide an integration signal;    
   sampling the integration signal at a frequency substantially higher than a frequency of the integration periods to provide digital samples of the integration signal;    
   comparing the digital samples to a predetermined value; and    
   resetting the integration period if a digital sample has a value greater than the predetermined value.