Method and apparatus for adjusting a power consumption level based on the amount of time a processor clock is stopped

Abstract

A power management mechanism for use in a computer system having a bus, a memory for storing data and instructions, and a central processing unit (CPU). The CPU runs an operating system having a power management virtual device driver (PMV×D) responsible for performing idle detection for devices. The PMV×D performs idle detection using event timers that provide an indicator as to the activity level. The PMV×D places idle local devices in a reduced power consumption state when no activity has occurred for a predetermined period of time.

1. A computer system comprising:
 a bus;    at least one memory coupled to the bus for storing data, including an operating system; and    a central processing unit (CPU) coupled to the bus running the operating system with a virtual device driver (V×D), wherein the virtual device driver performs device idle detection using one or more events timers indicating the activity level of at least one local device, and further wherein the virtual device driver places idle local devices in a reduced power consumption state when associated events timers indicate that no activity has occurred for a predetermined period of time.    
     
     
       2. The computer system defined in  claim 1  wherein the virtual device driver performs system idle detection. 
     
     
       3. The computer system defined in  claim 1  wherein the virtual device driver comprises I/O trapping capabilities to perform idle detection. 
     
     
       4. The computer system defined in  claim 1  wherein the virtual device driver comprises a V×D trap handler to perform idle detection. 
     
     
       5. The computer system defined in  claim 1  wherein the virtual device driver comprises a chained-interrupt trap handler to perform idle detection. 
     
     
       6. The computer system defined in  claim 1  wherein the memory stores data structures indicating enabled local devices being monitored by the device driver. 
     
     
       7. The computer system defined in  claim 1  wherein the memory stores data structures indicating events being monitored by the device driver. 
     
     
       8. The computer system defined in  claim 1  wherein the memory stores data structures indicating I/O address ranges for local devices. 
     
     
       9. The computer system defined in  claim 1  wherein the memory stores data structures indicating activity level of local devices to the device driver. 
     
     
       10. The computer system defined in  claim 1  wherein the memory stores data structures indicating power management states into which the device driver may place the computer system. 
     
     
       11. A computer system comprising:
 a bus;    a central processing unit (CPU) coupled to the bus running an operating system and at least one power-unaware application, wherein the operating system has a virtual device driver performing device idle detection using one or more events timers indicating the activity level of at least one local device, and further wherein the virtual device driver places idle local devices in a reduced power consumption state when associated events timers indicate that no activity has occurred for a predetermined period of time transparent to said at least one power-unaware application.    
     
     
       12. The computer system defined in  claim 11  wherein the virtual device driver performs system idle detection. 
     
     
       13. The computer system defined in  claim 11  wherein the virtual device driver comprises I/O trapping capabilities to perform idle detection. 
     
     
       14. The computer system defined in  claim 11  wherein the virtual device driver comprises a V×D trap handler to perform idle detection. 
     
     
       15. The computer system defined in  claim 11  wherein the virtual device driver comprises a chained-interrupt trap handler to perform idle detection. 
     
     
       16. The computer system defined in  claim 11  wherein the memory stores data structures indicating enabled local devices being monitored by the virtual device driver. 
     
     
       17. The computer system defined in  claim 11  wherein the memory stores data structures indicating events being monitored by the virtual device driver. 
     
     
       18. The computer system defined in  claim 11  wherein the memory stores data structures indicating I/O address ranges for local devices. 
     
     
       19. The computer system defined in  claim 11  wherein the memory stores data structures indicating activity level of local devices to the virtual device driver. 
     
     
       20. The computer system defined in  claim 11  wherein the memory stores data structures indicating power management states into which the virtual device driver may place the computer system. 
     
     
       21. A computer system comprising:
 at least one bus;    a memory coupled to said at least one bus;    a device coupled to said at least one bus;    a processor coupled to said at least one bus, wherein the processor is configured to execute a virtual device driver to control placement of said device into a reduced power consumption state.    
     
     
       22. The computer system defined in  claim 21  wherein the virtual device driver performs idle detection for the device. 
     
     
       23. The computer system defined in  claim 21  wherein the virtual device driver performs idle detection for the device using at least one event timer indicating the activity level of the device. 
     
     
       24. The computer system defined in  claim 23  wherein the virtual device driver places the device in a reduced power consumption state when said at least one events timer indicates that no activity has occurred for a predetermined period of time. 
     
     
       25. The computer system defined in  claim 21  wherein the processor runs at least one power-unaware application and the virtual device driver places the device in the reduced power consumption state transparent to said at least one power-unaware application. 
     
     
       26. The computer system defined in  claim 21  wherein the memory stores data structures indicating enabled local devices being monitored by the virtual device driver, events being monitored by the virtual device driver, I/O address ranges for local devices, and activity level of local devices to the virtual device driver. 
     
     
       27. The computer system defined in  claim 21  wherein the virtual device driver comprises a V×D trap handler to perform idle detection. 
     
     
       28. The computer system defined in  claim 21  wherein the device comprises an I/O device. 
     
     
       29. A method for controlling an input/output (I/O) device, said method comprising the steps of:
 executing a virtual device driver;    monitoring activity of the I/O device;    detecting the I/O device being inactive for a predetermined period of time; and    the virtual device driver placing the I/O device in a reduced power consumption state in response to the I/O device being detected as inactive.    
     
     
       30. The method defined in  claim 29  further comprising the step of initializing, at boot-up time, a plurality of data structures associated with the virtual device driver. 
     
     
       31. The method defined in  claim 29  wherein the step of monitoring comprises the virtual device driver monitoring activity of the I/O device at the occurrence of a system timer interrupt. 
     
     
       32. The method defined in  claim 29  further comprising the step of varying the predetermined period of time. 
     
     
       33. The method defined in  claim 32  wherein the predetermined period of time is varied based on desired power savings. 
     
     
       34. The method defined in  claim 29  further comprising the step of the virtual device driver adjusting an events timer according to activity of the device. 
     
     
       35. The method defined in  claim 29  further comprising the steps of:
 a configuration manager notifying the virtual device driver of system resources being remapped; and    the virtual device driver examining its data structures to adapt itself to the remapped system resources.    
     
     
       36. A machine- readable medium having stored thereon instructions, which if executed by a machine, cause said machine to perform operations comprising:      determining an amount of time a processor is in a first power consumption state, said amount of time said processor is in said first power consumption state comprising a period of time in which a clock of said processor is stopped;        reducing a voltage level applied to said processor in response to said amount of time said processor is in said first power consumption state.     
     
     
       37. The machine- readable medium of    claim 36    wherein reducing said voltage level applied to said processor is performed in response to said amount of time exceeding a selected amount of time.   
     
     
       38. The machine- readable medium of    claim 37    wherein determining comprises reading a timer to determine said amount of time said processor is in said first power consumption state.   
     
     
       39. The machine- readable medium of    claim 38    wherein said reducing said voltage level comprises placing said processor in a power - off state.   
     
     
       40. The machine- readable medium of    claim 36    wherein determining the amount of time said processor is in the first power consumption state comprises monitoring an activity level demand within a computer system.   
     
     
       41. The machine- readable medium of    claim 40    wherein reducing the voltage level applied to the processor comprises operating said processor in a reduced power consumption state while satisfying said activity level demand.   
     
     
       42. A machine- readable medium having stored thereon instructions, which if executed by a machine, cause said machine to perform operations comprising:      determining an amount of time a clock of a processor is stopped;        placing said processor into a reduced power consumption state in response to said amount of time said clock of said processor is stopped.     
     
     
       43. The machine- readable medium of    claim 42    wherein said placing comprises reducing a voltage of said processor.   
     
     
       44. The machine- readable medium of    claim 43    wherein said determining an amount of time said clock of said processor is stopped contributes to determining a system idle time.   
     
     
       45. The machine- readable medium of    claim 44    wherein said clock of said processor is stopped when the processor is in a sleep state.   
     
     
       46. The machine- readable medium of    claim 45    wherein a timer is read to determine said amount of time said processor is in said first power consumption state.   
     
     
       47. The machine- readable medium of    claim 46    wherein said reduced power consumption state is a power - off state.   
     
     
       48. The machine- readable medium of    claim 43    wherein reducing said voltage of said processor is performed in response to said amount of time said clock of said processor is stopped exceeding a selected amount of time.   
     
     
       49. An apparatus comprising:
   a power management module to determine an amount of time a processor is in a first power consumption state, said first power consumption state comprising a period in which said processor is stopped;        a power reduction module to place said processor into a reduced power consumption state in response to said amount of time said processor is in said first power consumption state.     
     
     
       50. The apparatus of  claim 49  wherein said power reduction module comprises a software routine. 
     
     
       51. The apparatus of  claim 50  wherein said power management module comprises a timer. 
     
     
       52. The apparatus of  claim 51  wherein said power reduction module is enabled to reduce a voltage applied to said processor. 
     
     
       53. The apparatus of  claim 52  wherein said power reduction module is enabled to reduce said voltage in response to said amount of time exceeding a selected amount of time. 
     
     
       54. The apparatus of  claim 53  wherein said power management module comprises a software routine. 
     
     
       55. The apparatus of  claim 54  wherein said first power consumption state is a sleep state. 
     
     
       56. The apparatus of  claim 55  wherein said reduced power consumption state is a power- off state.   
     
     
       57. The apparatus of  claim 49  wherein said power management module comprises a timer. 
     
     
       58. An apparatus comprising:
   a power management module to determine an amount of time a processor is in a first power consumption state, said first power consumption state comprising a period in which said processor is stopped;        a power reduction module to place said processor into a reduced power consumption state in response to said amount of time said processor is in said first power consumption state, said power reduction module comprising a software routine, said power management module comprising a timer.     
     
     
       59. A system comprising:
   a memory;        a processor coupled to said memory;        a power management module to detect an amount of time said processor is in a first power consumption state, said first power consumption state comprising a period of time in which a clock of said processor is stopped, said processor being placed into a reduced power consumption state in response to said amount of time said processor is in said first power consumption state.     
     
     
       60. The system of  claim 59  wherein said reduced power consumption state comprises a reduced voltage state of said processor. 
     
     
       61. The system of  claim 60  wherein said reduced voltage state comprises a power- off state.   
     
     
       62. The system of  claim 61  wherein said power management module is enabled to determine a system idle time. 
     
     
       63. The system of  claim 62  wherein said system idle time is represented by said amount of time said processor is in said first power consumption state. 
     
     
       64. The system of  claim 63  wherein said first power consumption state is a sleep state. 
     
     
       65. The system of  claim 64  wherein said power management module comprises a software routine. 
     
     
       66. The system of  claim 65  wherein said power management module further comprises a timer. 
     
     
       67. The system of  claim 59  wherein said power management module comprises a software routine. 
     
     
       68. The system of  claim 59  wherein said power management module further comprises a timer. 
     
     
       69. The system of  claim 59  further comprising a configurable device;
   power management software to power manage said configurable device.     
     
     
       70. The system of  claim 69  further comprising:
   power management software to cooperate with said device manager to allow power management of a plurality of devices in the system which are configurable devices, and to manage a power level for each of the plurality of devices in the system, the power management software being capable of placing one or more of said plurality of devices in a reduced power consumption state.     
     
     
       71. The system of  claim 70  further comprising a plug and play manager. 
     
     
       72. The system of  claim 71  wherein said power management software is to communicate with said plug and play manager to update data structures if configuration changes occur to allow power management of dynamically reconfigurable devices. 
     
     
       73. The system of  claim 72  wherein said power management software registers with said device manager to be notified of configuration changes. 
     
     
       74. The system of  claim 73  wherein said power management software is to provide system level power management including the use of multiple system level power management states for said system, and to provide multiple power management states for said plurality of devices. 
     
     
       75. The system of  claim 73  wherein said power management software is to provide support for idle detection for at least one of said plurality of devices. 
     
     
       76. The system of  claim 73  wherein said power management software is to place the system in a sleep state when the system is idle and to keep said system in said sleep state until activity is detected, and wherein the sleep state is one of a plurality of system power management states, and further wherein said system stops a clock for a system processor in said sleep state. 
     
     
       77. A method comprising:
   determining an amount of time a clock of a processor is stopped;        placing said processor into a reduced power consumption state in response to said amount of time said clock of said processor is stopped.     
     
     
       78. The method of  claim 77  wherein said placing comprises reducing a voltage of said processor. 
     
     
       79. The method of  claim 78  wherein said determining said amount of time said clock of said processor is stopped contributes to determining a system idle time. 
     
     
       80. The method of  claim 79  wherein said clock of said processor is stopped when the processor is in a sleep state. 
     
     
       81. The method of  claim 80  wherein a timer is read to determine said amount of time said processor is in a first power consumption state. 
     
     
       82. The method of  claim 81  wherein said reduced power consumption state is a power- off state.   
     
     
       83. The method of  claim 82  wherein reducing said voltage of said processor is performed in response to said amount of time said clock of said processor is stopped exceeding a selected amount of time. 
     
     
       84. The method of  claim 83  further comprising power managing in cooperation with a device manager a plurality of devices in a system which are configurable devices; and managing a power level for each of the plurality of devices in the system, the power managing comprising placing one or more of said plurality of devices in a reduced power consumption state. 
     
     
       85. The method of  claim 84  wherein said system comprises a plug and play manager. 
     
     
       86. The method of  claim 85  wherein said power managing comprises communicating with said plug and play manager to update data structures if configuration changes occur to allow power management of dynamically reconfigurable devices. 
     
     
       87. The method of  claim 86  further comprising registering power management software with said device manager to be notified of configuration changes. 
     
     
       88. The method of  claim 87  wherein said power managing comprises supporting idle detection for at least one of said plurality of devices. 
     
     
       89. The method of  claim 87  wherein said power managing comprises placing the system in a sleep state when the system is idle and to keep said system in said sleep state until activity is detected, and wherein the sleep state is one of a plurality of system power management states, and further wherein said system stops a clock for a system processor in said sleep state. 
     
     
       90. The system of  claim 86  wherein said power managing comprises providing system level power management including the use of multiple system level power management states for said system, and to provide multiple power management states for said plurality of devices.